Time-controlled switch capacitor based temperature sensor
An apparatus comprises: a first circuitry to charge first and second capacitors to a predetermined voltage level; a second circuitry to discharge the first capacitor through a diode at a first time; a third circuitry to discharge the second capacitor through the diode at a second time, wherein the second time is greater than the first time; a comparator to compare a first voltage of the first capacitor with a second voltage of the second capacitor; and logic to adjust a scaling factor applied to the second voltage according to an output of the comparator.
1. An apparatus comprising:
circuitry to:
charge first and second capacitors to a predetermined voltage level;
discharge the first capacitor through a diode at a first time; and
discharge the second capacitor through the diode at a second time, wherein the second time is greater than the first time;
a comparator coupled to the circuitry, the comparator to compare a first voltage of the first capacitor with a second voltage of the second capacitor; and
logic coupled to the comparator, the logic to adjust a scaling factor applied to the second voltage according to an output of the comparator.
2. The apparatus of claim 1 , wherein the logic is to increase the scaling factor when the first voltage is greater than a product of a previous value of the scaling factor and the second voltage.
3. The apparatus of claim 1 , wherein the logic is to decrease the scaling factor when the first voltage is less than or equal to a product of a previous value of the scaling factor and the second voltage.
4. The apparatus of claim 1 , wherein the diode comprises a p-n junction between a silicon substrate and a well.
5. The apparatus of claim 1 , wherein the logic comprises a successive approximation register.
6. A system comprising:
a memory;
a processor coupled to the memory, the processor including a thermal sensor circuit which includes:
circuitry to:
charge first and second capacitors to a predetermined voltage level;
discharge the first capacitor through a diode at a first time; and
discharge the second capacitor through the diode at a second time, wherein the second time is greater than the first time;
a comparator coupled to the circuitry, the comparator to compare a first voltage of the first capacitor with a second voltage of the second capacitor; and
logic coupled to the comparator, the logic to adjust a scaling factor applied to the second voltage according to an output of the comparator; and
a wireless interface to allow the processor to communicate with another device.
7. The system of claim 6 , wherein the diode is positioned near a hot spot of the processor.
8. The system of claim 6 , wherein the processor comprises a finite state machine to control timing of turning on one or more devices of the circuitry.
9. The system of claim 6 , wherein the logic comprises a successive approximation register.
10. The system of claim 6 , wherein the logic is to increase the scaling factor when the first voltage is greater than a product of a previous value of the scaling factor and the second voltage.
11. The system of claim 6 , wherein the logic is to decrease the scaling factor when the first voltage is less than or equal to a product of a previous value of the scaling factor and the second voltage.
12. The system of claim 6 , wherein the diode comprises a p-n junction between a silicon substrate and a well.
13. An apparatus comprising:
a comparator to compare a first voltage of a first capacitor with a second voltage of a second capacitor; and
logic coupled to the comparator, the logic to adjust a scaling factor applied to the second voltage according to an output of the comparator, wherein the logic is to adjust the scaling factor according to the first voltage and a product of a previous value of the scaling factor and the second voltage.
14. The apparatus of claim 13 , wherein the logic is to increase the scaling factor when the first voltage is greater than the product of a previous value of the scaling factor and the second voltage.
15. The apparatus of claim 13 , wherein the logic is to decrease the scaling factor when the first voltage is less than or equal to the product of a previous value of the scaling factor and the second voltage.
16. The apparatus of claim 13 , further comprising a circuitry coupled to the comparator, wherein the circuitry is to charge the first capacitor and the second capacitor to a predetermined voltage level.
17. The apparatus of claim 16 , wherein the circuitry discharges the first capacitor through a diode at a first time.
18. The apparatus of claim 17 , wherein the circuitry is to discharge the second capacitor through the diode at a second time, wherein the second time is greater than the first time.
19. The apparatus of claim 18 , wherein the diode comprises a p-n junction between a silicon substrate and a well.