IP Library Granted Patent US 10,303,903
Granted Patent B2
US 10,303,903 · App. 15/947,379 · Granted May 28, 2019

Countermeasures for fault-injection attacks by optical and electromagnetic pulses

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Quick Facts
Patent No.
US 10,303,903
App. No.
15/947,379
Granted
May 28, 2019
Kind
B2
Abstract

In a general aspect, an integrated circuit can include a network configured to detect fault-injection attacks on the integrated circuit, the network including a plurality of optical sensors. The integrated circuit can also include a surveillance flip-flop coupled with the network, the surveillance flip-flop being configured to signal a fault when one or more optical sensors of the plurality of optical sensors changes state. The integrated circuit can further include at least one inductive winding included in the network, the at least one inductive winding being configured to generate an induced voltage that causes switching of at least one optical sensor of the plurality of optical sensors when the at least one inductive winding is subjected to an electromagnetic flux capable of causing a fault-injection in the integrated circuit.

Claims (10)

1. An integrated circuit comprising:

a network configured to detect fault-injection attacks on the integrated circuit, the network including a plurality of optical sensors;

a surveillance flip-flop coupled with the network, the surveillance flip-flop being configured to signal a fault when one or more optical sensors of the plurality of optical sensors changes state; and

at least one inductive winding included in the network, the at least one inductive winding being configured to generate an induced voltage that causes switching of at least one optical sensor of the plurality of optical sensors when the at least one inductive winding is subjected to an electromagnetic flux capable of causing a fault-injection in the integrated circuit.

2. The integrated circuit of claim 1 , wherein an inductive winding of the at least one inductive windings is coupled in series with a respective optical sensor.

3. The integrated circuit of claim 1 , wherein an optical sensor of the plurality of optical sensors includes a latch and an inductive winding of the at least one inductive windings is coupled between elements of the latch.

4. The integrated circuit of claim 1 , wherein the at least one inductive winding is flat and formed by tracks wound in a spiral on a metal level of the integrated circuit.

5. The integrated circuit of claim 1 , wherein the at least one inductive winding is a solenoid formed by tracks wound on different metal levels of the integrated circuit.

6. The integrated circuit according to claim 1 , wherein the plurality of optical sensors are powered at a voltage lower than a nominal power supply voltage of the integrated circuit.

7. The integrated circuit of claim 1 , wherein the plurality of optical sensors are coupled in a chain and the at least one winding is inserted in a link between a first optical sensor and a second optical sensor of the plurality of optical sensors.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2019
From: VERIMATRIX
To: RAMBUS INC.
Reel/Frame 051262/0413 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Nov 21, 2019
From: GLAS SAS, AS AGENT
To: INSIDE SECURE
Reel/Frame 051076/0306 →
CHANGE OF ADDRESS Recorded Oct 16, 2019
From: VERIMATRIX
To: VERIMATRIX
Reel/Frame 050733/0003 →
CHANGE OF NAME Recorded Oct 7, 2019
From: INSIDE SECURE
To: VERIMATRIX
Reel/Frame 050647/0428 →
SECURITY INTEREST Recorded Feb 27, 2019
From: INSIDE SECURE
To: GLAS SAS, AS SECURITY AGENT
Reel/Frame 048449/0887 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2018
From: MARTIN, MICHEL
To: INSIDE SECURE
Reel/Frame 046731/0825 →