IP Library Granted Patent US 10,812,584
Granted Patent B2
US 10,812,584 · App. 15/954,902 · Granted Oct 20, 2020

Methods, devices and computer readable mediums for data synchronization

Inventors: Lifeng Yang (Beijing, CN); Jian Gao (Beijing, CN); Xinlei Xu (Beijing, CN); Ruiyong Jia (Beijing, CN); Yousheng Liu (Beijing, CN)
Assignee: EMC IP Holding Company LLC
H04L67/1095G06F15/17331G06F15/76H04L67/2842
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Quick Facts
Patent No.
US 10,812,584
App. No.
15/954,902
Granted
Oct 20, 2020
Kind
B2
Abstract

Embodiments of the present disclosure relate to methods, devices and computer readable mediums for data synchronization. A method comprises in response to receiving, at a first processor, a first request to synchronize data, initiating, to a second processor, a first remote direct memory access (RDMA) operation for transmitting the data between a first cache in the first processor and a second cache in the second processor. The method further comprises in response to completion of the first RDMA operation, writing the data into a first persistent storage device coupled to the first processor. The method further comprises transmitting, to the second processor, a command to instruct the second processor to commit the data to a second persistent storage device coupled to the second processor. Moreover, the method further comprises detecting, from the second processor, an acknowledgement for the command, the acknowledgement indicating that the data is synchronized between the first and second processors.

Claims (58)

1. A method of data synchronization, comprising:

in response to receiving, at a first processor, a first request to synchronize data, initiating a first remote direct memory access (RDMA) operation to a second processor, wherein the first RDMA operation comprises either an RDMA write operation that is configured to cause the data to be written from a first cache in the first processor into a second cache in the second processor, or an RDMA read operation that is configured to cause the data to be read from the second cache into the first cache;

in response to completion of the first RDMA operation, writing the data from the first cache into a first persistent storage device coupled to the first processor;

in response to writing the data into the first persistent storage device, transmitting a commit command to the second processor, wherein the commit command is configured to cause the second processor to write the data from the second cache into a second persistent storage device coupled to the second processor; and

detecting, at the first processor, an acknowledgement from the second processor, the acknowledgement indicating that the second processor has written the data from the second cache into the second persistent storage device.

2. The method according to claim 1 , wherein the first RDMA operation is initiated via a network connecting the first and second processors, and the network is an Infiniband network.

3. The method according to claim 1 , wherein the first RDMA operation comprises an RDMA write operation, and wherein initiating the first RDMA operation to the second processor comprises:

initiating the RDMA write operation to the second processor such that the data is transmitted from the first cache to the second cache.

4. The method according to claim 3 , wherein writing the data into the first persistent storage device coupled to the first processor comprises:

in response to receiving, from the second processor, an acknowledgement for the RDMA write operation, writing the data from the first cache into the first persistent storage device.

5. The method according to claim 1 , wherein the first RDMA operation comprises an RDMA read operation, and wherein initiating the first RDMA operation to the second processor comprises:

initiating the RDMA read operation to the second processor such that the data is transmitted from the second cache to the first cache.

6. The method according to claim 2 , wherein transmitting the commit command to the second processor comprises:

initiating, to the second processor and via the network, a second RDMA operation; and

wherein detecting the acknowledgement for the command comprises:

detecting, from the second processor, an acknowledgement for the second RDMA operation.

7. The method according to claim 6 , wherein the second RDMA operation is an RDMA write operation.

8. The method according to claim 1 , further comprising:

receiving, at the first processor, a first RDMA operation acknowledgement from the second processor, the first RDMA operation acknowledgement indicating that the second processor has received the data within the second cache; and

wherein detecting the acknowledgement includes:

receiving the acknowledgement, at the first processor, the acknowledgement having been sent from the second processor to the first processor prior to the second processor writing the data from the second cache into the persistent storage device coupled to the second processor.

9. The method according to claim 1 , wherein the first persistent storage device includes shared disk storage; and wherein writing the data into the first persistent storage device includes:

in response to completion of the first RDMA operation, writing the data into the shared disk storage.

10. The method according to claim 1 , wherein the first processor and the first persistent storage device form at least a portion of a first array that processes input/output (I/O) commands on behalf of a set of hosts;

wherein the second processor and the second persistent storage device form at least a portion of a second array that communicates with the first array through a network; and

wherein the first array and the second array operate to replicate data from the set of hosts.

11. A device for data synchronization, comprising:

at least one processing unit; and

at least one memory coupled to the at least one processing unit and storing instructions for execution by the at least one processing unit, the instructions, when executed by the at least one processing unit, causing the device to perform acts comprising:

in response to receiving, at a first processor, a first request to synchronize data initiating a first remote direct memory access (RDMA) operation to a second processor, wherein the first RDMA operation comprises either an RDMA write operation that is configured to cause the data to be written from a first cache in the first processor into a second cache in the second processor, or an RDMA read operation that is configured to cause the data to be read from the second cache into the first cache;

in response to completion of the first RDMA operation, writing the data from the first cache into a first persistent storage device coupled to the first processor;

in response to writing the data into the first persistent storage device, transmitting a commit command to the second processor, wherein the commit command is configured to cause the second processor to write the data from the second cache into to a second persistent storage device coupled to the second processor; and

detecting, at the first processor, an acknowledgement from the second processor, the acknowledgement indicating that the second processor has written the data from the second cache into the second persistent storage device.

12. The device according to claim 11 , wherein the first RDMA operation is initiated via a network connecting the first and second processors, and the network is an Infiniband network.

13. The device according to claim 11 , wherein the first RDMA operation comprises an RDMA write operation, and wherein initiating the first RDMA operation to the second processor comprises:

initiating the RDMA write operation to the second processor such that the data is transmitted from the first cache to the second cache.

14. The device according to claim 13 , wherein writing the data into the first persistent storage device coupled to the first processor comprises:

in response to receiving, from the second processor, an acknowledgement for the RDMA write operation, writing the data from the first cache into the first persistent storage device.

15. The device according to claim 11 , wherein the first RDMA operation comprises an RDMA read operation, and wherein initiating the first RDMA operation to the second processor comprises:

initiating the RDMA read operation to the second processor such that the data is transmitted from the second cache to the first cache.

16. The device according to claim 12 , wherein transmitting the commit command to the second processor comprises:

initiating, to the second processor and via the network, a second RDMA operation; and

wherein detecting the acknowledgement for the command comprises:

detecting, from the second processor, an acknowledgement for the second RDMA operation.

17. The device according to claim 16 , wherein the second RDMA operation is an RDMA write operation.

18. A computer program product having a non-transitory computer readable medium which stores a set of instructions to perform data synchronization; the set of instructions, when carried out by a first processor, causing the first processor to perform a method of:

in response to receiving, at a first processor, a first request to synchronize data, initiating a first remote direct memory access (RDMA) operation to a second processor, wherein the first RDMA operation comprises either an RDMA write operation that is configured to cause the data to be written from a first cache in the first processor into a second cache in the second processor, or an RDMA read operation that is configured to cause the data to be read from the second cache into the first cache;

in response to completion of the first RDMA operation, writing the data from the first cache into a first persistent storage device coupled to the first processor;

in response to writing the data into the first persistent storage device, transmitting a commit command to the second processor, wherein the commit command is configured to cause the second processor to write the data from the second cache into to a second persistent storage device coupled to the second processor; and

detecting, at the first processor, an acknowledgement from the second processor, the acknowledgement indicating that the second processor has written the data from the second cache into the second persistent storage device.

19. The computer program product as in claim 18 wherein the first processor and the second processor form a storage system that stores data on behalf of a host computer; and

wherein the method further includes:

receiving, as the first request to synchronize data, a host input/output (I/O) command from the host computer.

20. The computer program product as in claim 19 wherein the method further includes:

prior to receiving the host I/O command, configuring the first processor and the second processor to operate the second cache as a remote mirror of the first cache.

21. The computer program product as in claim 20 wherein the first processor and the second processor of the storage system communicate over an infiniband network; and wherein the method further includes:

prior to receiving the host I/O command, configuring the first processor and the second processor to communicate with a set of switches of the Infiniband network.

22. The computer program product as in claim 21 wherein the first RDMA operation is a block-based transaction that conveys the data from the first processor to the second processor through the Infiniband network to effectuate block-level data synchronization between the first processor and the second processor.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (046366/0014) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060450/0306 →
RELEASE OF SECURITY INTEREST AT REEL 046286 FRAME 0653 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0093 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 046366/0014 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 046286/0653 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2018
From: YANG, LIFENG; GAO, JIAN; XU, XINLEI; JIA, RUIYONG; LIU, YOUSHENG
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 045589/0098 →
Cited By (1)
US 12,353,718