IP Library Granted Patent US 10,546,225
Granted Patent B2
US 10,546,225 · App. 15/955,495 · Granted Jan 28, 2020

Metal contactless smart card and method for fabricating the same

Inventors: Nam Joo Kim (Seoul, KR); Heui Chul Hwang (Daegu, KR)
Assignees: Soo Hyang Kang; Nam Joo Kim
G06K19/07722G06K19/07773
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Quick Facts
Patent No.
US 10,546,225
App. No.
15/955,495
Granted
Jan 28, 2020
Kind
B2
Abstract

A metal contactless smart card includes a first metal layer having a first slit, a second layer, a radio-frequency integrated circuit chip module, and an inlay having an antenna. A nonconductive insert may be fitted in the slit. The first metal layer may include an inlay recess where the inlay may be received and a through-hole where the chip may be inserted. The second layer of the smart card may be made of metal and may also include a slit.

Claims (45)

1. A method for fabricating a smart card having a first metal layer ( 10 or 10 ′) with a first slit ( 15 or 15 ′), a RFIC chip module ( 20 ), an inlay ( 40 ) having an antenna, and a second layer ( 60 or 80 ) comprising the steps of:

forming a RFIC chip module through-hole ( 12 ) and an inlay recess ( 11 ) on the first metal layer ( 10 );

plugging the first slit ( 15 or 15 ′) formed in the first layer ( 10 ) with a nonconductive material;

layering the inlay ( 40 ) on the second layer ( 60 or 80 );

layering a dummy chip module ( 20 ′) on the inlay ( 40 ) such that the dummy chip module is positioned in the through-hole;

subsequent to the steps of layering the inlay on the second layer and layering the dummy chip module on the inlay, bonding the first layer ( 10 or 10 ′) and the second layer ( 60 or 80 ); and

after bonding the first layer ( 10 ) and the second layer ( 60 ), removing the dummy chip module ( 20 ′) and installing the RFIC chip module ( 20 ).

2. The method of claim 1 , wherein the first layer ( 10 or 10 ′) and the second layer ( 60 or 80 ) are bonded by heat-pressing.

3. The method of claim 1 , wherein the recess ( 11 ) surrounds the through-hole ( 12 ).

4. The method of claim 1 , wherein the first slit ( 15 ) is at least 0.1 mm in width.

5. The method of claim 1 , wherein the cross-sectional profile of the first slit ( 15 ′) is wider on the lower side of the first metal layer ( 10 ′) than an upper side of the first metal layer ( 10 ).

6. The method of claim 1 , wherein the second layer ( 60 ) is made of a synthetic resin.

7. The method of claim 1 , wherein the inlay ( 40 ) comprises a substrate, the antenna having a first wound coil ( 42 ) and a second wound coil ( 42 ′), and two inlay terminals ( 41 and 41 ′),

wherein the inlay terminals ( 41 and 41 ′) are formed to pass through the substrate of the inlay ( 40 ) as to be exposed on both sides of the inlay ( 40 ),

wherein the inlay terminals ( 41 and 41 ′) are formed at the ends of the first wound coil ( 42 ) and the second wound coil ( 42 ′),

wherein the first wound coil ( 42 ) is formed on a surface of the substrate of the inlay ( 40 ) and the second coil ( 42 ′) is formed on an opposite surface of the substrate of the inlay ( 40 ),

wherein the two coils ( 42 and 42 ′) are connected by a via hole ( 43 ) formed through the substrate of the inlay ( 40 ),

wherein the inlay terminals ( 41 and 41 ′) are electrically connected to two RFIC chip module terminals ( 14 and 14 ′),

wherein one of the two coils ( 42 and 42 ′) further comprises a wide portion ( 42 a ) and the other of the two coils ( 42 and 42 ′) further comprises a plurality of islands ( 44 and 44 ′), wherein the overall capacitance of the inlay may be adjusted by electrically insulating a number of islands ( 44 ′) and facilitate impedance matching.

8. The method of claim 1 , wherein the second layer ( 80 ) is metallic and comprises a second slit ( 85 ),

wherein the second slit ( 85 ) is disposed from an interior portion of the second layer ( 80 ) to an edge of the second layer ( 80 ),

wherein the second slit ( 85 ) is disposed to be substantially aligned in a lengthwise direction with the first slit ( 15 ) and shifted in a widthwise direction with respect to the first slit ( 15 ) by less than the width of the first slit ( 15 ) and an insert having a shape corresponding to the stacked slits is snugly fit in the slits.

9. A method for fabricating a smart card having a first metal layer ( 10 or 10 ′) with a slit ( 15 and 15 ′), an RFIC chip module ( 20 ), an inlay ( 40 ) having an antenna, and a second layer ( 60 or 80 ) comprising the steps of:

forming a RFIC chip module through-hole ( 12 ) and an inlay recess ( 11 ) on the first metal layer ( 10 or 10 ′);

positioning the inlay ( 40 ) on the inlay recess ( 11 ), an insert ( 90 ) in the first slit ( 15 or 15 ′) of the first metal layer ( 10 or 10 ′), and a dummy chip ( 20 ′) in the through-hole ( 12 );

subsequent to the step of position the inlay, the insert, and the dummy chip, bonding the first metal layer ( 10 or 10 ′) on a second layer ( 60 or 80 ) by heat-pressing; and

removing the dummy chip module ( 20 ′) and installing a RFIC chip module ( 20 ).

10. The method claim 9 , wherein the insert ( 90 ) has a shape corresponding to the slit ( 15 or 15 ′), wherein the insert ( 90 ) is made of a nonconductive material.

11. The method claim 10 , wherein the insert ( 90 ′) comprises a rod-shaped body ( 90 a ) with a left wing and a right wing ( 90 b ),

wherein the left wing and right wing ( 90 b ) are formed on opposite sides of the rod-shaped body ( 90 a ),

wherein the left wing and right wing ( 90 b ) are smaller than the rod-shaped body ( 90 a ).

12. A method for fabricating a smart card having a first metal layer ( 10 or 10 ′) with a first slit ( 15 or 15 ′), a RFIC chip module ( 20 ), an inlay ( 40 ) having an antenna, and a second layer ( 60 or 80 ) comprising the steps of:

forming a RFIC chip module through-hole ( 12 ) and an inlay recess ( 11 ) on the first metal layer ( 10 );

plugging the first slit ( 15 or 15 ′) formed in the first layer ( 10 ) with a nonconductive material;

layering the inlay ( 40 ) on the second layer ( 60 or 80 );

layering a dummy chip module ( 20 ′) on the inlay ( 40 );

bonding the first layer ( 10 or 10 ′) and the second layer ( 60 or 80 ); and

after bonding the first layer ( 10 ) and the second layer ( 60 ), removing the dummy chip module ( 20 ′) and installing the RFIC chip module ( 20 ),

wherein the second layer ( 80 ) is metallic and comprises a second slit ( 85 ), wherein the second slit ( 85 ) is disposed from an interior portion of the second layer ( 80 ) to an edge of the second layer ( 80 ),

wherein the second slit ( 85 ) is disposed to be substantially aligned in a lengthwise direction with the first slit ( 15 ) and shifted in a widthwise direction with respect to the first slit ( 15 ) by less than the width of the first slit ( 15 ) and an insert having a shape corresponding to the stacked slits is snugly fit in the slits.

13. The method of claim 12 , wherein the first layer ( 10 or 10 ′) and the second layer ( 60 or 80 ) are bonded by heat-pressing.

14. The method of claim 13 , wherein the cross-sectional profile of the first slit ( 15 ′) is wider on the lower side of the first metal layer ( 10 ′) than an upper side of the first metal layer ( 10 ).

15. The method of claim 12 , wherein the recess ( 11 ) surrounds the through-hole ( 12 ).

16. The method of claim 12 , wherein the first slit ( 15 ) is at least 0.1 mm in width.

17. The method of claim 12 , wherein the second layer ( 60 ) is made of a synthetic resin.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2024
From: KIM, NAM JOO
To: SECURE PLATFORMS TECHNOLOGY CO., LTD.
Reel/Frame 068226/0695 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2024
From: KANG, SOO HYANG
To: ICK INTERNATIONAL INC.
Reel/Frame 066575/0071 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2018
From: HWANG, HEUI CHUL
To: KANG, SOO HYANG
Reel/Frame 045565/0898 →
Priority Claims (1)
KR 10-2016-0048787 · Apr 21, 2016 · national
Continuity (2)
Division 15489318 · Apr 17, 2017
Related Publication 20180232617A1 · Aug 16, 2018