Overcurrent, overcharge, and overdischarge detection and responsive switch control
A charge/discharge control circuit includes a control circuit which outputs a control signal to a charge control terminal and a discharge control terminal respectively, a charge/discharge monitoring circuit which monitors charge/discharge of a secondary battery, a charger detection circuit connected to a charger detection terminal and configured to detect a charger connection, and a load open detection circuit connected to the charger detection terminal and configured to detect a state of a load. In response to reception of a signal to instruct turning on of a charge control FET from the charger detection circuit, the control circuit turns on the charge control FET even when the control circuit turned off the charge control FET in response to the signal to instruct turning off of the charge control FET from the charge/discharge monitoring circuit.
1. A charge/discharge control circuit, comprising:
a first power supply terminal connected to a first electrode of a secondary battery;
a second power supply terminal connected to a second electrode of the secondary battery;
a charge control terminal connected to a gate terminal of a charge control FET which controls charging to the secondary battery;
a discharge control terminal connected to a gate terminal of a discharge control FET which controls discharging from the secondary battery;
an overcurrent detection terminal connected to a source terminal of the discharge control FET;
a charger detection terminal connected to a charger;
a control circuit configured to output a control signal to the charge control terminal and the discharge control terminal respectively;
a charge/discharge monitoring circuit connected to the first power supply terminal and the second power supply terminal, configured to monitor charge/discharge of the secondary battery, and configured to output a signal to instruct turning off of the charge control FET or the discharge control FET to the control circuit in response to detection of overcharge or overdischarge of the secondary battery;
an overcurrent detection circuit connected to the overcurrent detection terminal and configured to output a signal to instruct turning off of the discharge control FET to the control circuit according to detection of a discharge overcurrent, based on a voltage of the overcurrent detection terminal;
a charger detection circuit connected to the charger detection terminal and configured to output a signal to instruct turning on of the charge control FET to the control circuit in response to detecting, by the charger detection circuit, that the charger is disconnected based on a voltage of the charger detection terminal; and
a load open detection circuit connected to the charger detection terminal and configured to output a signal to instruct turning on of the discharge control FET to the control circuit according to detection based on the voltage of the charger detection terminal that a load connected to the charger detection terminal is in a normal state,
wherein the control circuit is configured to turn on the charge control FET in response to the signal to instruct turning on of the charge control FET from the charger detection circuit responsive to detecting that the charger is disconnected, even when the control circuit turns off the charge control FET in response to the signal to instruct turning off of the charge control FET from the charge/discharge monitoring circuit, and
wherein the charger detection terminal is connected to the load through the charge control FET, and the load open detection circuit is connected to the load through the charger detection terminal and the charge control FET.
2. A battery apparatus comprising:
the charge/discharge control circuit according to claim 1 ;
the secondary battery having the first electrode and the second electrode;
a charge/discharge terminal connected to the first electrode of the secondary battery;
a resistor having one end connected to the second electrode of the secondary battery;
the discharge control FET having the source terminal connected to another end of the resistor;
the charge control FET having a drain terminal connected to a drain terminal of the discharge control FET;
a charge terminal connected to a source terminal of the charge control FET; and
a discharge terminal connected to a connecting point of the charge control FET and the discharge control FET.