IP Library Granted Patent US 10,714,653
Granted Patent B2
US 10,714,653 · App. 15/959,974 · Granted Jul 14, 2020

Compound semiconductor solar cell and method of manufacturing the same

Inventors: Wonseok Choi (Seoul, KR); Gunho Kim (Seoul, KR)
Assignee: LG ELECTRONICS INC.
H01L31/1844H01L31/03042H01L31/03046H01L31/068H01L31/0687H01L31/0693H01L31/0725H01L31/0735Y02E10/544Y02P70/521
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Quick Facts
Patent No.
US 10,714,653
App. No.
15/959,974
Granted
Jul 14, 2020
Kind
B2
Abstract

Disclosed is a method of manufacturing a compound semiconductor solar cell according to an embodiment of the invention. The method of manufacturing the compound semiconductor solar cell according to the embodiment of the invention includes forming a plurality of compound semiconductor layers of at least two elements and including a base layer and an emitter layer, the base layer including a first conductivity type dopant to have a first conductivity type and the emitter layer including a second conductivity type dopant to have a second conductivity type. The forming of the plurality of compound semiconductor layers includes at least one of a process-temperature change period and a growth-rate change period.

Claims (37)

1. A method of manufacturing a compound semiconductor solar cell, the method comprising:

forming a plurality of compound semiconductor layers of at least two elements, the plurality of compound semiconductor layers including a base layer and an emitter layer, the base layer including an n type dopant to have an n type and the emitter layer including a p type dopant to have a p type,

wherein the forming of the plurality of compound semiconductor layers includes at least one of a process-temperature change period and a growth-rate change period,

wherein the forming of the plurality of compound semiconductor layers comprises:

forming a p type semiconductor layer including the emitter layer and having the p type; and

forming an n type semiconductor layer on the p type semiconductor layer,

wherein the n type semiconductor layer includes the base layer and has the n type, and

wherein the forming of the n type semiconductor layer includes a period having a processing temperature lower than a processing temperature of the forming of the p type semiconductor layer, or a process temperature to form the base layer is lower than a process temperature to form the emitter layer.

2. The method of claim 1 , wherein at least one of the base layer and the emitter layer comprises a compound semiconductor layer including gallium (Ga), indium (In) and phosphorus (P) as one of the at least two elements.

3. The method of claim 1 , wherein the process-temperature change period comprises a process-temperature decreasing period in which a process temperature decreases.

4. The method of claim 1 , wherein the forming of the plurality of compound semiconductor layers includes a plurality of processes including an initial process and a final process, and

wherein a process temperature of the final process is lower than a process temperature of the initial process.

5. The method of claim 3 , wherein the process-temperature change period comprises at least one of a stepwise decreasing portion in which the process temperature is stepwisely decreased and a gradual decreasing portion in which the process temperature is gradually decreased.

6. The method of claim 3 , wherein the process-temperature change period includes a plurality of process-temperature change periods, and a temperature change by each of the plurality of process-temperature change periods is 5° C. or more.

7. The method of claim 1 , wherein the growth-rate change period comprises a growth-rate increasing period in which a growth rate increases.

8. The method of claim 1 , wherein the forming of the plurality of compound semiconductor layers includes a plurality of processes including an initial process and a final process, and

wherein a growth rate of the final process is greater than a growth rate of the initial process.

9. The method of claim 7 ,

wherein the forming of the n type semiconductor layer includes a period having a growth rate greater than a growth rate in the forming of the p type semiconductor layer; or

wherein a growth rate to form the base layer is lower than a growth rate to form the emitter layer.

10. The method of claim 9 , wherein a thickness of the base layer is greater than a thickness of the emitter layer.

11. The method of claim 9 , wherein the forming of the n type semiconductor layer comprises:

forming the base layer; and

forming a contact layer on the base layer,

wherein the contact layer is formed of a material different from a material of the base layer, and

wherein the contact layer is thinner than the base layer or has a thickness of 30 to 150 nm.

12. The method of claim 7 , wherein the growth-rate change period includes a plurality of growth-rate change periods, and

wherein a growth-rate change by each of the plurality of growth-rate change periods is 0.1 μm/hr or more.

13. The method of claim 7 , wherein the growth-rate change period comprises at least one of a stepwise increasing portion in which the growth rate is stepwisely increased and a gradual increasing portion in which the growth rate is gradually increased.

14. The method of claim 1 ,

wherein the base layer has the n-type,

wherein the base layer comprises a gallium-indium-phosphorous (GaInP) layer, and

wherein the emitter layer comprises a gallium-indium-phosphorus (GaInP) layer or an aluminum-gallium-indium-phosphorus (AlGaInP) layer.

15. The method of claim 1 , further comprising, before the forming of the plurality of compound semiconductor layers:

forming another photoelectric conversion unit; and

forming a tunnel junction layer on the another photoelectric conversion unit,

wherein the compound semiconductor solar cell has a multi-junction structure.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2024
From: SHANGRAO XINYUAN YUEDONG TECHNOLOGY DEVELOPMENT CO. LTD
To: JINGAO SOLAR CO., LTD
Reel/Frame 067599/0894 →
CHANGE OF NAME Recorded Dec 11, 2023
From: SHANGRAO JINKO SOLAR TECHNOLOGY DEVELOPMENT CO., LTD
To: SHANGRAO XINYUAN YUEDONG TECHNOLOGY DEVELOPMENT CO. LTD
Reel/Frame 066044/0299 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2022
From: LG ELECTRONICS INC.
To: SHANGRAO JINKO SOLAR TECHNOLOGY DEVELOPMENT CO., LTD
Reel/Frame 061571/0754 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2018
From: CHOI, WONSEOK; KIM, GUNHO
To: LG ELECTRONICS INC.
Reel/Frame 045635/0548 →
Priority Claims (1)
KR 10-2017-0052520 · Apr 24, 2017 · national
Continuity (1)
Related Publication 20180309017A1 · Oct 25, 2018