Gate drive adapter
A gate drive adapter circuit includes an input circuit, an output circuit, and a charge pump circuit. The input circuit is configured to receive pulses suitable for controlling a silicon power transistor. The output circuit is coupled to the input circuit. The output circuit is configured to translate the pulses to voltages suitable for controlling a silicon-carbide power transistor. The charge pump circuit is coupled to the input circuit and to the output circuit. The charge pump circuit is configured to generate a negative voltage. The output circuit is configured to apply the negative voltage to translate the pulses.
1. A silicon-carbide transistor adapter, comprising:
an input terminal;
an output terminal;
a capacitor, comprising:
a first terminal; and
a second terminal;
a first transistor comprising:
a base terminal coupled to the input terminal;
an emitter terminal coupled to the output terminal; and
a collector terminal coupled to the second terminal of the capacitor;
a second transistor, comprising:
a base terminal coupled to the input terminal; and
an emitter terminal coupled to the first terminal of the capacitor; and
a third transistor comprising:
a gate terminal coupled to the input terminal;
an drain terminal coupled to:
a silicon carbide high-side power rail;
the base terminal of the first transistor; and
the base terminal of the second transistor.
2. The silicon-carbide transistor adapter of claim 1 , further comprising a Zener diode coupled to:
a source terminal of the third transistor; and
the second terminal of the capacitor.
3. The silicon-carbide transistor adapter of claim 1 , further comprising: a fourth transistor comprising:
a gate terminal coupled to the signal input terminal;
an source terminal coupled to a silicon transistor driver high-side power rail; and
a drain terminal coupled to the gate terminal of the third transistor.
4. The silicon-carbide transistor adapter of claim 1 , further comprising:
a fourth transistor comprising:
a base terminal coupled to the input terminal;
a collector terminal coupled to a silicon carbide high-side power rail; and
an emitter terminal coupled to the output terminal, and to the emitter terminal of the second transistor.