IP Library Granted Patent US 10,698,782
Granted Patent B2
US 10,698,782 · App. 15/968,100 · Granted Jun 30, 2020

Link downgrade detection system

Inventors: Anh Dinh Luong (Austin, TX); Thomas Kelley Chenault (Round Rock, TX)
Assignee: Dell Products L.P.
G06F11/26G06F9/4401G06F11/221G06F11/2284G06F13/4068
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Quick Facts
Patent No.
US 10,698,782
App. No.
15/968,100
Granted
Jun 30, 2020
Kind
B2
Abstract

A link downgrade detection system includes an interface that is coupled to an endpoint device. The endpoint device is configured to provide an endpoint link that includes a first link capability at a maximum first link capability level and a second link capability at a maximum second link capability level. The endpoint device stores a working first link capability level and a working second link capability level in a first memory device included on the endpoint device. A BIOS coupled to the chassis interface enumerates the endpoint device, determines an actual first link capability level and an actual second link capability level, and retrieves the working link capability levels. The BIOS then determines, based on the working link capability levels and the actual link capability levels that the endpoint link is downgraded, and in response provides a notification that the endpoint link of the endpoint device is downgraded.

Claims (57)

1. A link downgrade detection system, comprising:

a chassis;

a chassis interface that is included on the chassis;

an endpoint device that includes an endpoint interface that is coupled to the chassis interface, wherein the endpoint device is configured to provide an endpoint link that includes a first link capability at a maximum first link capability level and a second link capability at a maximum second link capability level, and wherein the endpoint device is configured to store a working first link capability level and a working second link capability level in a first memory device included on the endpoint device; and

a Basic Input/Output System (BIOS) that is located in the chassis and that is coupled to the chassis interface, and wherein the BIOS is configured, during a boot process, to:

enumerate the endpoint device;

determine an actual first link capability level of the first link capability of the endpoint device;

determine an actual second link capability level of the second link capability of the endpoint device;

retrieve the working first link capability level and the working second link capability level from the first memory device;

determine, based on the working first link capability level, the working second link capability level, the actual first link capability level, and the actual second link capability level, that the endpoint link is downgraded; and

provide in response to determining that the endpoint link is downgraded, a notification that the endpoint link of the endpoint device is downgraded.

2. The system of claim 1 , wherein at least one of the working first link capability level and the working second link capability level is less than the maximum first link capability level and the maximum second link capability level, respectively.

3. The system of claim 1 , wherein the working first link capability level and the working second link capability level are included in a Vital Product Data (VPD) structure stored in the first memory device.

4. The system of claim 1 , wherein the determining the endpoint link is downgraded includes determining that at least one of:

the actual first link capability level is less than the working first link capability level; and

the actual second link capability level is less than the working second link capability level.

5. The system of claim 1 , wherein the maximum first link capability level and the maximum second link capability level are stored in a second memory device that is included on the endpoint device and that is separate from the first memory device, and wherein the actual first link capability level and the actual second link capability level are stored in a third memory device that is separate from the first memory device.

6. The system of claim 1 , wherein the BIOS is further configured to:

determine, based on the working first link capability level, the working second link capability level, the actual first link capability level and the actual second link capability level, that the endpoint link is not downgraded; and

advance, in response to determining that the endpoint link is not downgraded, the boot operation.

7. The system of claim 6 , wherein the determining that the endpoint link is not downgraded includes determining that both the actual first link capability level is at least the working first link capability level and the actual second link capability level is at least the working second link capability level.

8. An Information Handling System (IHS), comprising:

an interface;

a processing subsystem coupled to the interface; and

a memory subsystem that is coupled to the processing subsystem and that includes instructions that, when executed by the processing subsystem, causes the processing subsystem to provide a Basic Input/Output System (BIOS) that is configured to:

enumerate an endpoint device that includes an endpoint interface that is coupled to the interface, wherein the endpoint device is configured to provide an endpoint link that includes a first link capability at a maximum first link capability level and a second link capability at a maximum second link capability level, and wherein the endpoint device is configured to store a working first link capability level and a working second link capability level in a first memory device included on the endpoint device;

determine an actual first link capability level of the first link capability of the endpoint device;

determine an actual second link capability level of the second link capability of the endpoint device;

retrieve the working first link capability level and the working second link capability level from the first memory device;

determine, based on the working first link capability level, the working second link capability level, the actual first link capability level, and the actual second link capability level, that the endpoint link is downgraded; and

provide in response to determining that the endpoint link is downgraded, a notification that the endpoint link of the endpoint device is downgraded.

9. The IHS of claim 8 , wherein at least one of the working first link capability level and the working second link capability level is less than the maximum first link capability level and the maximum second link capability level, respectively.

10. The IHS of claim 8 , wherein the working first link capability level and the working second link capability level are included in a Vital Product Data (VPD) structure stored in the first memory device.

11. The IHS of claim 8 , wherein the determining the endpoint link is downgraded includes determining that at least one of:

the actual first link capability level is less than the working first link capability level; and

the actual second link capability level is less than the working second link capability level.

12. The IHS of claim 8 , wherein the maximum first link capability level and the maximum second link capability level are stored in a second memory device that is included on the endpoint device and that is separate from the first memory device, and wherein the actual first link capability level and the actual second link capability level are stored in a third memory device that is separate from the first memory device.

13. The IHS of claim 8 , wherein the BIOS is further configured to:

determine, based on the working first link capability level, the working second link capability level, the actual first link capability level and the actual second link capability level, that the endpoint link is not downgraded; and

advance, in response to determining that the endpoint link is not downgraded, a boot process.

14. The IHS of claim 13 , wherein the determining that the endpoint link is not downgraded includes determining that both the actual first link capability level is at least the working first link capability level and the actual second link capability level is at least the working second link capability level.

15. A method for detecting a downgraded link, comprising:

enumerating, by a Basic Input/Output System (BIOS), an endpoint device that includes an endpoint interface that is coupled to the BIOS, wherein the endpoint device is configured to provide an endpoint link that includes a first link capability at a maximum first link capability level and a second link capability at a maximum second link capability level, and wherein the endpoint device is configured to store a working first link capability level and a working second link capability level in a first memory device included on the endpoint device;

determining, by the BIOS, an actual first link capability level of the first link capability of the endpoint device;

determining, by the BIOS, an actual second link capability level of the second link capability of the endpoint device;

retrieving, by the BIOS, the working first link capability level and the working second link capability level from the first memory device;

determining, by the BIOS and based on the working first link capability level, the working second link capability level, the actual first link capability level, and the actual second link capability level, that the endpoint link is downgraded; and

providing, by the BIOS and in response to determining that the endpoint link is downgraded, a notification that the endpoint link of the endpoint device is downgraded.

16. The method of claim 15 , wherein at least one of the working first link capability level and the working second link capability level is less than the maximum first link capability level and the maximum second link capability level, respectively.

17. The method of claim 15 , wherein the working first link capability level and the working second link capability level are included in a Vital Product Data (VPD) structure stored in the first memory device.

18. The method of claim 15 , wherein the determining the endpoint link is downgraded includes determining that at least one of:

the actual first link capability level is less than the working first link capability level; and

the actual second link capability level is less than the working second link capability level.

19. The method of claim 15 , wherein the maximum first link capability level and the maximum second link capability level are stored in a second memory device that is included on the endpoint device and that is separate from the first memory device, and wherein the actual first link capability level and the actual second link capability level are stored in a third memory device that is separate from the first memory device.

20. The method of claim 15 , further comprising:

determining, by the BIOS and based on the working first link capability level, the working second link capability level, the actual first link capability level and the actual second link capability level, that the endpoint link is not downgraded; and

advancing, by the BIOS and in response to determining that the endpoint link is not downgraded, a boot process.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (046366/0014) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060450/0306 →
RELEASE OF SECURITY INTEREST AT REEL 046286 FRAME 0653 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0093 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 046366/0014 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 046286/0653 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2018
From: LUONG, ANH DINH; CHENAULT, THOMAS KELLEY
To: DELL PRODUCTS L.P.
Reel/Frame 045684/0072 →