Early boot display system
A secondary processing system that is coupled to a primary processing system and a display system accesses a first memory system to load initial boot instructions and a video interpreter binary during a boot operation. The secondary processing system initializes the display controller included in the display system to provide a first graphical user interface for display on the display screen using the video interpreter binary and executes the initial boot instructions. The secondary processing system then detects a first interrupt event during the execution of the initial boot instructions and, in response, triggers the video interpreter binary to update the first graphical user interface displayed on the display screen to provide a second graphical user interface for display on the display screen.
1. A computing system, comprising:
a display system that includes a display controller and a display screen;
a first memory system that includes initial boot instructions and a video interpreter binary;
a primary processing system; and
a secondary processing system that is coupled to the primary processing system and the display system, wherein the secondary processing system is configured to access the first memory system to:
load the initial boot instructions and the video interpreter binary during a boot operation;
initialize the display controller included in the display system to provide a first graphical user interface for display on the display screen using the video interpreter binary;
execute the initial boot instructions; and
detect a first interrupt event during the execution of the initial boot instructions and, in response, trigger the video interpreter binary to update the first graphical user interface displayed on the display screen to provide a second graphical user interface for display on the display screen.
2. The system of claim 1 , wherein the secondary processing system is further configured to:
pass control of the boot operation to the primary processing system to provide for execution of primary boot instructions upon completion of the execution of the initial boot instructions.
3. The system of claim 2 , further comprising:
a second memory system that is coupled to the primary processing system, wherein the second memory system includes the primary boot instructions.
4. The system of claim 2 , wherein the secondary processing system is further configured to:
verify, in response to execution of the initial boot instructions, an integrity of the primary boot instructions.
5. The system of claim 1 , wherein the triggering of the video interpreter binary to update the first graphical user interface displayed on the display screen to provide the second graphical user interface for display on the display screen includes:
determine, based on a first offset that is stored in an interrupt vector table included in the video interpreter binary and that is identified by the first interrupt event, a first code entry in the interrupt vector table; and
execute the first code entry to update the first graphical user interface displayed on the display screen to provide the second graphical user interface for display on the display screen.
6. The system of claim 5 , wherein a first Power On Self Test (POST) code triggers the first interrupt event, and wherein the first interrupt event identifies the first POST code from which the first offset may be determined.
7. The system of claim 1 , wherein the secondary processing system is further configured to:
detect a second interrupt event during the execution of the initial boot instructions and, in response, trigger the video interpreter binary to update the second graphical user interface displayed on the display screen to provide a third graphical user interface for display on the display screen.
8. An information handling system (IHS), comprising:
a display system that includes a display controller and a display screen;
a first memory system that includes initial boot instructions and a video interpreter binary;
a primary processing system; and
a secondary processing system that is coupled to the primary processing system and the display system, wherein the secondary processing system is configured to access the first memory system to:
load the initial boot instructions and the video interpreter binary during a boot operation;
initialize the display controller included in the display system to provide a first graphical user interface for display on the display screen using the video interpreter binary;
execute the initial boot instructions; and
detect a first interrupt event during the execution of the initial boot instructions and, in response, trigger the video interpreter binary to update the first graphical user interface displayed on the display screen to provide a second graphical user interface for display on the display screen.
9. The IHS of claim 8 , wherein the secondary processing system is further configured to:
pass control of the boot operation to the primary processing system to provide for execution of primary boot instructions upon completion of the execution of the initial boot instructions.
10. The IHS of claim 9 , further comprising:
a second memory system that is coupled to the primary processing system, wherein the second memory system includes the primary boot instructions.
11. The IHS of claim 9 , wherein the secondary processing system is further configured to:
verify, in response to execution of the initial boot instructions, an integrity of the primary boot instructions.
12. The IHS of claim 8 , wherein the triggering of the video interpreter binary to update the first graphical user interface displayed on the display screen to provide the second graphical user interface for display on the display screen includes:
determine, based on a first offset that is stored in an interrupt vector table included in the video interpreter binary and that is identified by the first interrupt event, a first code entry in the interrupt vector table; and
execute the first code entry to update the first graphical user interface displayed on the display screen to provide the second graphical user interface for display on the display screen.
13. The IHS of claim 12 , wherein a first Power On Self Test (POST) code triggers the first interrupt event, and wherein the first interrupt event identifies the first POST code from which the first offset may be determined.
14. The IHS of claim 8 , wherein the secondary processing system is further configured to:
detect a second interrupt event during the execution of the initial boot instructions and, in response, trigger the video interpreter binary to update the second graphical user interface displayed on the display screen to provide a third graphical user interface for display on the display screen.
15. A method for providing early boot video, comprising:
loading, by a secondary processing system from a first memory system, initial boot instructions and a video interpreter binary during a boot operation;
initializing, by the secondary processing system a display controller included in a display system to provide a first graphical user interface for display on a display screen included on the display system using the video interpreter binary;
executing, by the secondary processing system, the initial boot instructions; and
detecting, by the secondary processing system, a first interrupt event during the execution of the initial boot instructions and, in response, triggering the video interpreter binary to update the first graphical user interface displayed on the display screen to provide a second graphical user interface for display on the display screen.
16. The method of claim 15 , further comprising:
passing, by the secondary processing system, control of the boot operation to a primary processing system to provide for execution of primary boot instructions upon completion of the execution of the initial boot instructions.
17. The method of claim 16 , wherein the primary boot instructions are stored on a second memory system that is coupled to the primary processing system.
18. The method of claim 16 , further comprising:
verifying, by the secondary processing system and in response to execution of the initial boot instructions, an integrity of the primary boot instructions.
19. The method of claim 15 , wherein the triggering of the video interpreter binary to update the first graphical user interface displayed on the display screen to provide the second graphical user interface for display on the display screen includes:
determining, by the secondary processing system and based on a first offset that is stored in an interrupt vector table included in the video interpreter binary and that is identified by the first interrupt event, a first code entry in the interrupt vector table; and
executing, by the secondary processing system, the first code entry to update the first graphical user interface displayed on the display screen to provide the second graphical user interface for display on the display screen.
20. The method of claim 15 , further comprising:
detecting, by the secondary processing system, a second interrupt event during the execution of the initial boot instructions and, in response, trigger the video interpreter binary to update the second graphical user interface displayed on the display screen to provide a third graphical user interface for display on the display screen.