IP Library Granted Patent US 10,489,242
Granted Patent B1
US 10,489,242 · App. 15/970,454 · Granted Nov 26, 2019

Memory scrub system

Inventors: Ching-Lung Chao (Austin, TX); Shih-Hao Wang (New Taipei, TW); Zhengyu Yang (Fremont, CA)
Assignee: Dell Products L.P.
G06F11/106G06F9/4401G06F11/0772G06F13/24G11C29/52
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Quick Facts
Patent No.
US 10,489,242
App. No.
15/970,454
Granted
Nov 26, 2019
Kind
B1
Abstract

A memory scrubbing system includes a persistent memory device coupled to an operating system (OS) and a Basic Input/Output System (BIOS). During a boot process and prior to loading the OS, the BIOS retrieves a known memory location list that identifies known memory locations of uncorrectable errors in the persistent memory device and performs a partial memory scrubbing operation on the known memory locations. The BIOS adds any known memory locations that maintain an uncorrectable error to a memory scrub error list. The BIOS then initiates a full memory scrubbing operation on the persistent memory device, cause the OS to load and enter a runtime environment while the full memory scrubbing operation is being performed, and provides the memory scrub error list to the OS.

Claims (73)

1. A persistent memory error detection system, comprising:

a chassis;

a persistent memory device located in the chassis;

an Operating System (OS) that is located in the chassis and coupled to the persistent memory device; and

a Basic Input/Output System (BIOS) that is located in the chassis and that is coupled to the persistent memory device and the OS, wherein the BIOS is configured to:

retrieve, during a boot process and prior to loading the OS, a known memory location list that identifies known memory locations of uncorrectable errors in the persistent memory device;

determine, during the boot process and while performing a partial memory scrubbing operation on the known memory locations in the persistent memory device that are identified in the known memory location list, whether any of the known memory locations maintain an uncorrectable error;

add the known memory locations that maintain an uncorrectable error to a memory scrub error list;

initiate a full memory scrubbing operation on the persistent memory device;

cause the OS to load and enter a runtime environment while the full memory scrubbing operation is being performed; and

provide the memory scrub error list to the OS.

2. The system of claim 1 , wherein the OS is configured to:

exclude known memory locations provided in the memory scrub error list from use.

3. The system of claim 1 , wherein the BIOS is further configured to:

detect an uncorrectable error in a first memory location of the persistent memory device during the full memory scrubbing operation that is being performed while the OS is in the runtime environment;

provide an interrupt to the OS in response to the uncorrectable error in the first memory location of the persistent memory device; and

add the first memory location to the memory scrub error list to provide an updated memory scrub error list.

4. The system of claim 3 , wherein the OS is configured to:

obtain the updated memory scrub error list in response to receiving the interrupt; and

exclude the first memory location that the BIOS detected as having an uncorrectable error during the full memory scrubbing operation from use.

5. The system of claim 3 , wherein the BIOS is further configured to:

add the first memory location to the known memory location list that identifies the known memory locations of uncorrectable errors in the persistent memory device.

6. The system of claim 1 , wherein the BIOS is further configured to:

complete the full memory scrubbing operation that is being performed while the OS is in the runtime environment and, in response, provide an interrupt to the OS indicating that the full memory scrubbing operation has completed, wherein the OS is configured to obtain the memory scrub error list in response to receiving the interrupt.

7. The system of claim 1 , wherein the BIOS is further configured to:

receive a command from the OS to begin the full memory scrubbing operation of the persistent memory device while the full memory scrubbing operation that was initiated by the BIOS is being performed; and

notify the OS that the full memory scrubbing operation of the persistent memory device is already in progress.

8. An Information Handling System (IHS), comprising:

a persistent memory device;

a processing subsystem coupled to the persistent memory device; and

a memory subsystem that is coupled to the processing subsystem and that includes instructions that, when executed by the processing subsystem, causes the processing subsystem to provide a Basic Input/Output System (BIOS) that is configured to:

retrieve, during a boot process and prior to loading an operating system (OS), a known memory location list that identifies known memory locations of uncorrectable errors in the persistent memory device;

determine, during the boot process and while performing a partial memory scrubbing operation on the known memory locations in the persistent memory device that are identified in the known memory location list, whether any of the known memory locations maintain an uncorrectable error;

add the known memory locations that maintain an uncorrectable error to a memory scrub error list;

initiate a full memory scrubbing operation on the persistent memory device;

cause the OS to load and enter a runtime environment while the full memory scrubbing operation is being performed; and

provide the memory scrub error list to the OS.

9. The IHS of claim 8 , wherein the memory scrub error list provided to the OS causes the OS to exclude known memory locations provided in the memory scrub error list from use.

10. The IHS of claim 8 , wherein the BIOS is further configured to:

detect an uncorrectable error in a first memory location of the persistent memory device during the full memory scrubbing operation that is being performed while the OS is in the runtime environment;

provide an interrupt to the OS in response to the uncorrectable error in the first memory location of the persistent memory device; and

add the first memory location to the memory scrub error list to provide an updated memory scrub error list.

11. The IHS of claim 10 , wherein the BIOS is further configured to:

add the first memory location to the known memory location list that identifies the known memory locations of uncorrectable errors in the persistent memory device.

12. The IHS of claim 8 , wherein the BIOS is further configured to:

complete the full memory scrubbing operation that is being performed while the OS is in the runtime environment and, in response, provide an interrupt to the OS indicating that the full memory scrubbing operation has completed, wherein the OS is configured to obtain the memory scrub error list in response to receiving the interrupt.

13. The IHS of claim 8 , wherein the BIOS is further configured to:

receive a command from the OS to begin the full memory scrubbing operation of the persistent memory device while the full memory scrubbing operation that was initiated by the BIOS is being performed; and

notify the OS that the full memory scrubbing operation of the persistent memory device is already in progress.

14. A method of memory scrubbing, comprising:

retrieving, by a basic input/output system (BIOS) during a boot process and prior to loading an operating system (OS), a known memory location list that identifies known memory locations of uncorrectable errors in a persistent memory device;

determining, by the BIOS during the boot process and while performing a partial memory scrubbing operation on the known memory locations in the persistent memory device that are identified in the known memory location list, whether any of the known memory locations maintain an uncorrectable error;

adding, by the BIOS, the known memory locations that maintain an uncorrectable error to a memory scrub error list;

initiating, by the BIOS, a full memory scrubbing operation on the persistent memory device;

causing, by the BIOS, the OS to load and enter a runtime environment while the full memory scrubbing operation is being performed; and

providing, by the BIOS, the memory scrub error list to the OS.

15. The method of claim 14 , further comprising:

excluding, by the operating system, known memory locations provided in the memory scrub error list from use.

16. The method of claim 14 , further comprising:

detecting, by the BIOS, an uncorrectable error in a first memory location of the persistent memory device during the full memory scrubbing operation that is being performed while the OS is in the runtime environment;

providing, by the BIOS, an interrupt to the OS in response to the uncorrectable error in the first memory location of the persistent memory device; and

adding, by the BIOS, the first memory location to the memory scrub error list to provide an updated memory scrub error list.

17. The method of claim 16 , further comprising:

obtaining, by the OS, the updated memory scrub error list in response to receiving the interrupt; and

excluding, by the OS, the first memory location that the BIOS detected as having an uncorrectable error during the full memory scrubbing operation from use.

18. The method of claim 16 , further comprising:

adding, by the BIOS, the first memory location to the known memory location list that identifies the known memory locations of uncorrectable errors in the persistent memory device.

19. The method of claim 14 , further comprising:

completing, by the BIOS, the full memory scrubbing operation that is being performed while the OS is in the runtime environment and, in response, providing an interrupt to the OS indicating that the full memory scrubbing operation has completed; and

obtaining, by the OS, the memory scrub error list in response to receiving the interrupt.

20. The method of claim 14 , further comprising:

receiving, by the BIOS, a command from the OS to begin the full memory scrubbing operation of the persistent memory device while the full memory scrubbing operation that was initiated by the BIOS is being performed; and

notifying, by the BIOS, the OS that the full memory scrubbing operation of the persistent memory device is already in progress.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (046366/0014) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060450/0306 →
RELEASE OF SECURITY INTEREST AT REEL 046286 FRAME 0653 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0093 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 046366/0014 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 046286/0653 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2018
From: YANG, ZHENGYU
To: DELL PRODUCTS L.P.
Reel/Frame 045710/0484 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2018
From: CHAO, CHING-LUNG; WANG, SHIH-HAO
To: DELL PRODUCTS L.P.
Reel/Frame 045710/0560 →