IP Library Granted Patent US 10,891,382
Granted Patent B2
US 10,891,382 · App. 15/971,637 · Granted Jan 12, 2021

Cybersecurity by I/O inferred from execution traces

Inventors: Timothy K. Bryant (Indialantic, FL); Andrew R. Calvano (Draper, UT)
Assignee: Raytheon Company
G06F21/577G06F12/145G06F21/54G06F2212/1052G06F2221/034
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Quick Facts
Patent No.
US 10,891,382
App. No.
15/971,637
Granted
Jan 12, 2021
Kind
B2
Abstract

A method can include for vulnerability analysis based on input or output points inferred from execution traces can include monitoring application access operations to a memory, monitoring responses from the memory to the access operations, generating execution traces based on the monitored access operations and responses, the execution traces including data identifying an instruction to be performed and a corresponding memory location to access in performing the operation, identifying and recording whether the instruction corresponds to an input or an output to the system based on the generated execution traces, and determining vulnerabilities of the application based on the generated execution traces and identification of the instruction corresponding to the input or output.

Claims (45)

1. A non-transitory machine-readable medium including instructions that, when executed by a machine, cause the machine to perform operations comprising:

monitoring application access operations to a memory;

monitoring responses from the memory to the access operations;

generating and recording execution traces based on the monitored access operations and responses, the execution traces including data identifying an instruction to be performed and a corresponding memory location to access in performing the operation;

identifying and recording, with a corresponding execution trace, whether the instruction corresponds to an input or an output to the application based on the generated execution traces including recording an instruction corresponds to an output in response to determining a memory address of the instruction is written to multiple times by the application and recording an instruction corresponds to an input in response to determining a memory address of the instruction is written to by an entity other than the application and is subsequently accessed by the application; and

determining vulnerabilities of the application based on the recorded execution traces.

2. The non-transitory machine-readable medium of claim 1 , wherein:

monitoring the application access operations or the monitoring the responses includes recording first data including a memory address of an instruction and a program counter, an instruction pointer, an instruction size, and a number of operands in an instruction to be executed.

3. The non-transitory machine-readable medium of claim 2 , wherein:

monitoring the application access operations or the monitoring the responses includes recording second data including a length of data to be read or written, and a value of the data at the memory address.

4. The non-transitory machine-readable medium of claim 3 , wherein:

generating execution traces includes storing, in a first document and for each instruction executed by the application, the first data.

5. The non-transitory machine-readable medium of claim 4 , further comprising generating a memory file including storing, in a second document and for each instruction executed by the application, the second data.

6. The non-transitory machine-readable medium of claim 5 , further comprising identifying whether the input or output is a memory pointer.

7. The non-transitory machine-readable medium of claim 6 , wherein identifying whether the input or output is a memory pointer includes:

comparing a value of the access operation or response to a page size of a data memory to be accessed based on the memory pointer and a size of the value to an entry size of the data memory; and

determining that the input or output is a memory pointer if (1) the value of the access operation or response is a multiple of the page size and the size of the value is a multiple of the entry size.

8. A method for vulnerability analysis based on input or output points inferred from execution traces, the method comprising:

monitoring application access operations to a memory;

monitoring responses from the memory to the access operations;

generating and recording execution traces based on the monitored access operations and responses, the execution traces including data identifying an instruction to be performed and a corresponding memory location to access in performing the operation;

identifying and recording, with a corresponding execution trace, whether the instruction corresponds to an input or an output to the application based on the generated execution traces including recording an instruction corresponds to an output in response to determining a memory address of the instruction is written to multiple times by the application and recording an instruction corresponds to an input in response to determining a memory address of the instruction is written to by an entity other than the application and is subsequently accessed by the application; and

determining vulnerabilities of the application based on the recorded execution traces.

9. The method of claim 8 , wherein:

monitoring the application access operations or the monitoring the responses includes recording first data including a memory address of an instruction and a program counter, an instruction pointer, an instruction size, and a number of operands in an instruction to be executed.

10. The method of claim 9 , wherein:

monitoring the application access operations or the monitoring the responses includes recording second data including a length of data to be read or written, and a value of the data at the memory address.

11. The method of claim 10 , wherein:

generating execution traces includes storing, in a first document and for each instruction executed by the application, the first data.

12. The method of claim 11 , further comprising generating a memory file including storing, in a second document and for each instruction executed by the application, the second data.

13. A system comprising:

processing circuitry;

a memory including program instructions that, when executed the processing circuitry, configure the processing circuitry to:

monitor application access operations to a memory;

monitor responses from the memory to the access operations;

generate execution traces based on the monitored access operations and responses, the execution traces including data identifying an instruction to be performed and a corresponding memory location to access in performing the operation;

identify and record whether the instruction corresponds to an input or an output to the application based on the generated execution traces including recording an instruction corresponds to an output in response to determining a memory address of the instruction is written to multiple times by the application and recording an instruction corresponds to an input in response to determining a memory address of the instruction is written to by an entity other than the application and is subsequently accessed by the application; and

determine vulnerabilities of the application based on the generated execution traces and identification of the instruction corresponding to the input or output.

14. The system of claim 13 , wherein the processing circuitry is further configured to identify whether the input or output is a memory pointer.

15. The system of claim 14 , wherein identification of whether the input or output is a memory pointer includes:

compare a value of the access operation or response to a page size of a data memory to be accessed based on the memory pointer and a size of the value to an entry size of the data memory; and

determine that the input or output is a memory pointer if (1) the value of the access operation or response is a multiple of the page size and the size of the value is a multiple of the entry size.

16. The system of claim 15 , wherein:

generation of the execution traces includes storing, in a first document and for each instruction executed by the application, the first data; and

the processing circuitry is further configured to generate a memory file including storing, in a second document and for each instruction executed by the application, the second data.

Assignments (4)
CHANGE OF NAME Recorded Jul 3, 2024
From: COLUMBUS BUYER LLC
To: NIGHTWING GROUP, LLC
Reel/Frame 068106/0251 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2024
From: RAYTHEON COMPANY
To: COLUMBUS BUYER LLC
Reel/Frame 068233/0420 →
SECURITY INTEREST Recorded Apr 1, 2024
From: COLUMBUS BUYER LLC; RAYTHEON BLACKBIRD TECHNOLOGIES, INC.; RAYTHEON FOREGROUND SECURITY, INC.
To: WELLS FARGO BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 066960/0411 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2018
From: BRYANT, TIMOTHY K.; CALVANO, ANDREW R.
To: RAYTHEON COMPANY
Reel/Frame 045723/0190 →
Continuity (1)
Related Publication 20190340366A1 · Nov 7, 2019
Cited By (1)
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