IP Library Granted Patent US 11,269,715
Granted Patent B2
US 11,269,715 · App. 15/972,137 · Granted Mar 8, 2022

Systems and methods for adaptive proactive failure analysis for memories

Inventors: Vijay Bharat Nijhawan (Austin, TX); Wade Andrew Butcher (Cedar Park, TX); Vadhiraj Sankaranarayanan (Austin, TX)
Assignee: Dell Products L.P.
G06F11/0793G06F11/079G06F11/0727G06F11/0754G06F11/3037
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,269,715
App. No.
15/972,137
Granted
Mar 8, 2022
Kind
B2
Abstract

In accordance with embodiments of the present disclosure, an information handling system may include a processor, a memory communicatively coupled to the processor and comprising a plurality of non-volatile memories, and a failure analysis module comprising a program of instructions, the failure analysis module configured to, when read and executed by the processor, set a predictive failure threshold for each of the plurality of non-volatile memories based at least on functional parameters of such non-volatile memory, and adapt the predictive failure threshold for each of the plurality of non-volatile memories based at least on health status parameters of such non-volatile memory.

Claims (32)

1. An information handling system comprising:

a processor;

a memory communicatively coupled to the processor and comprising a plurality of non- volatile memories; and

a failure analysis module comprising a program of instructions, the failure analysis module configured to, when read and executed by the processor:

set a predictive failure threshold for each of the plurality of non-volatile memories based at least on functional parameters of each respective non-volatile memory, wherein the predictive failure threshold of each respective non-volatile memory is a leaky-bucket threshold for such non-volatile memory, such that when a number of correctable errors associated with such non-volatile memory exceeds the predictive failure threshold, the failure analysis module is configured to generate an indication that such non-volatile memory is susceptible to failure, wherein the functional parameters include operational features that are enabled or not enabled by each respective non-volatile memory, the operational features including at least one error-correcting code (ECC) feature, such that the predictive failure threshold is dependent on whether or not each operational feature is enabled by each respective non-volatile memory, wherein a first non-volatile memory for which the at least one ECC feature is enabled has a different predictive failure threshold than a second non-volatile memory for which the at least one ECC feature is not enabled; and

adapt the predictive failure threshold for each of the plurality of non-volatile memories based at least on health status parameters of each respective non-volatile memory.

2. The information handling system of claim 1 , the failure analysis module further configured to:

read, from each of the plurality of non-volatile memories, a health status register associated with each respective non-volatile memory and indicative of the health status parameters of each respective non-volatile memory; and

adapt the predictive failure threshold for each of the plurality of non-volatile memories based at least on information in the health status register of each respective non-volatile memory.

3. The information handling system of claim 1 , wherein each of the plurality of non-volatile memories comprises a storage class memory.

4. The information handling system of claim 1 , wherein the functional parameters of each respective non-volatile memory further comprise a memory type of each respective non-volatile memory.

5. The information handling system of claim 1 , wherein the health status parameters of each respective non-volatile memory comprise at least one of a number of spare sectors of each respective non-volatile memory remaining, an occurrence of thermal excursions within each respective non-volatile memory, and a number of correctable errors within media of each respective non-volatile memory itself.

6. A method comprising, in an information handling system comprising a processor and a memory communicatively coupled to the processor and comprising a plurality of non-volatile memories:

setting a predictive failure threshold for each of the plurality of non-volatile memories based at least on functional parameters of each respective non-volatile memory, wherein the predictive failure threshold of each respective non-volatile memory is a leaky-bucket threshold for such non-volatile memory, such that when a number of correctable errors associated with such non-volatile memory exceeds the predictive failure threshold, the failure analysis module is configured to generate an indication that such non-volatile memory is susceptible to failure, wherein the functional parameters include operational features that are enabled or not enabled by each respective non-volatile memory, the operational features including at least one error-correcting code (ECC) feature, such that the predictive failure threshold is dependent on whether or not each operational feature is enabled by each respective non-volatile memory, wherein a first non-volatile memory for which the at least one ECC feature is enabled has a different predictive failure threshold than a second non-volatile memory the at least one ECC feature is not enabled; and

adapting the predictive failure threshold for each of the plurality of non-volatile memories based at least on health status parameters of each respective non-volatile memory.

7. The method of claim 6 , further comprising:

reading, from each of the plurality of non-volatile memories, a health status register associated with each respective non-volatile memory and indicative of the health status parameters of each respective non-volatile memory; and

adapting the predictive failure threshold for each of the plurality of non-volatile memories based at least on information in the health status register of each respective non- volatile memory.

8. The method of claim 6 , wherein each of the plurality of non-volatile memories comprises a storage class memory.

9. The method of claim 6 , wherein the functional parameters of each respective non-volatile memory further comprise a memory type of each respective non-volatile memory.

10. The method of claim 6 , wherein the health status parameters of each respective non-volatile memory comprise at least one of a number of spare sectors of each respective non-volatile memory remaining, an occurrence of thermal excursions within each respective non-volatile memory, and a number of correctable errors within media of each respective non-volatile memory itself.

11. An article of manufacture comprising:

a non-transitory computer-readable medium; and

computer-executable instructions carried on the computer-readable medium, the instructions readable by a processor, the instructions, when read and executed, for causing the processor to, in an information handling system comprising a memory communicatively coupled to the processor and comprising a plurality of non-volatile memories:

set a predictive failure threshold for each of the plurality of non-volatile memories based at least on functional parameters of each respective non-volatile memory, wherein the predictive failure threshold of each respective non-volatile memory is a leaky-bucket threshold for such non-volatile memory, such that when a number of correctable errors associated with such non-volatile memory exceeds the predictive failure threshold, the failure analysis module is configured to generate an indication that such non-volatile memory is susceptible to failure, wherein the functional parameters include operational features that are enabled or not enabled by each respective non-volatile memory, the operational features including at least one error-correcting code (ECC) feature, such that the predictive failure threshold is dependent on whether or not each operational feature is enabled by each respective non-volatile memory, wherein a first non-volatile memory for which the at least one ECC feature is enabled has a different predictive failure threshold than a second non-volatile memory for which the at least one ECC feature is not enabled; and

adapt the predictive failure threshold for each of the plurality of non-volatile memories based at least on health status parameters of each respective non-volatile memory.

12. The article of claim 11 , the instructions for further causing the processor to:

read, from each of the plurality of non-volatile memories, a health status register associated with each respective non-volatile memory and indicative of the health status parameters of each respective non-volatile memory; and

adapt the predictive failure threshold for each of the plurality of non-volatile memories based at least on information in the health status register of each respective non-volatile memory.

13. The article of claim 11 , wherein each of the plurality of non-volatile memories comprises a storage class memory.

14. The article of claim 11 , wherein the functional parameters of each respective non-volatile memory further comprise a memory type of each respective non-volatile memory.

15. The article of claim 11 , wherein the health status parameters of each respective non-volatile memory comprise at least one of a number of spare sectors of each respective non-volatile memory remaining, an occurrence of thermal excursions within each respective non-volatile memory, and a number of correctable errors within media of each respective non-volatile memory itself.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (047648/0422) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060160/0862 →
RELEASE OF SECURITY INTEREST AT REEL 047648 FRAME 0346 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0510 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Oct 12, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 047648/0346 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Oct 12, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 047648/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2018
From: SANKARANARAYANAN, VADHIRAJ
To: DELL PRODUCTS L.P.
Reel/Frame 045733/0008 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2018
From: NIJHAWAN, VIJAY BHARAT; BUTCHER, WADE ANDREW
To: DELL PRODUCTS L.P.
Reel/Frame 045732/0963 →