Phase tuning in waveguide arrays
The wavelength response of an arrayed waveguide grating can be tuned, in accordance with various embodiments, using a beam sweeper including one or more heaters to shift a lateral position of light focused by the beam sweeper at an interface of the beam sweeper with an input free propagation region of the arrayed waveguide grating.
1. A photonic integrated circuit (PIC) comprising:
a silicon-on-insulator (SOI) substrate comprising a silicon handle, a buried oxide layer disposed on top of the silicon handle, a silicon device layer disposed on top of the buried oxide layer, and a cladding layer disposed on top of the silicon device layer;
an array of waveguides formed at least partially within the silicon device layer;
one or more pairs of forward and backward heaters disposed at least partially within at least one of the cladding layer or the silicon device layer and laterally overlapping with the array of waveguides, each heater configured to impart an incremental heat-induced phase shift between the waveguides, the phase shift imparted by the forward heater being of an opposite sign than the phase shift imparted by the backward heater; and
one or more back-etched regions formed within the silicon handle underneath respective one or more bidirectional pair of heaters.
2. The PIC of claim 1 , wherein the back-etched region has a constant width across the array of waveguides.
3. The PIC of claim 2 , wherein the constant width does not exceed forty micrometers.
4. The PIC of claim 1 , wherein the one or more back-etched region are confined to regions substantially coinciding with areas defined by the respective one or more pairs of heaters.
5. The PIC of claim 1 , wherein the heaters laterally overlap with a straight section of the array of waveguides.
6. The PIC of claim 1 , wherein the heaters laterally overlap with a section of the array of waveguides in which the waveguides all have a common curvature.
7. The PIC of claim 1 , further comprising thermal-isolation channels formed in at least one of the silicon device layer or the cladding layer surrounding heated regions of the array of waveguides.
8. The PIC of claim 1 , wherein the heaters are implemented in the cladding layer and each of the heaters comprises a heating filament winding across an area laterally overlapping with a region of the array of waveguides to be heated.
9. The PIC of claim 8 , wherein the heating filaments comprise heating segments of equal and constant width connected by metal connections.
10. The PIC of claim 9 , wherein the wherein the metal connections have a lower electrical resistance than the heating filaments.
11. The PIC of claim 8 , further comprising temperature-sensing elements embedded in the cladding layer between the heating segments of the heating filament.
12. The PIC of claim 11 , further comprising thermal isolation trenches formed in the cladding layer between adjacent heating segments and temperature-sensing elements.
13. The PIC of claim 1 , wherein each of the heaters comprise doped, resistive regions in the silicon device layer.
14. The PIC of claim 1 , comprising a plurality of pairs of forward and backward heaters configured to operate in parallel.
15. The PIC of claim 1 , wherein each of the heaters is configured to impart a constant incremental phase shift between all pairs of adjacent waveguides of the array.
16. The PIC of claim 15 , wherein each of the heaters is configured to heat a heated region spatially overlapping with the array of waveguides to a substantially uniform temperature so as to impart a uniform phase shift per unit length of heated waveguide, the heated region being shaped and positioned such that heated waveguide portions increase, between all pairs of adjacent waveguides, by constant length increments.
17. The PIC of claim 16 , wherein the waveguides are uniformly spaced in the heated region and the heated regions are triangular in shape.
18. The PIC of claim 15 , wherein spacings between the waveguides are selected based on a temperature distribution associated with the heaters to achieve the constant incremental phase shift.
19. A method comprising:
in a photonic integrated circuit (PIC) comprising a silicon-on-insulator (SOI) substrate, an array of waveguides formed at least partially within a silicon device layer of the SOI substrate, a pair of forward and backward heaters disposed at least partially within at least one of a cladding layer or the silicon device layer and laterally overlapping with the array of waveguides, and a back-etched region formed within the SOI substrate underneath the pair of heaters,
using one of the forward or backward heaters to impart incremental heat-induced phase shifts between adjacent waveguides of the array, the phase shifts imparted by the forward heater being of an opposite sign than the phase shifts imparted by the backward heater,
wherein the back-etched region reduces dissipation of heat generated by the one of the forward or backward heaters in the SOI substrate.
20. The method of claim 19 , wherein the forward and backward heaters comprise heating filaments winding across areas laterally overlapping with regions of the array of waveguides to be heated, the method further comprising:
computing a temperature distribution created by the pair of forward and backward heaters based on a configuration of the heating filaments; and
computing the phase shifts imparted on the waveguides from the temperature distribution.