IP Library Granted Patent US 10,503,663
Granted Patent B2
US 10,503,663 · App. 15/989,922 · Granted Dec 10, 2019

Method and device for secure processing of encrypted data

Inventors: Jean-Philippe Fassino (Gresin, FR); Roland Bohrer (Grenoble, FR); Laurent Gerard (La Tronche, FR)
Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
G06F12/1408G06F21/10G06F21/79G06F21/84H04L9/0825H04N21/42623G06F2212/1052G06F2221/2141
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Quick Facts
Patent No.
US 10,503,663
App. No.
15/989,922
Granted
Dec 10, 2019
Kind
B2
Abstract

A method for secure processing of encrypted data within a receiver includes receiving a packet of encrypted compressed data and allocating a region of memory for storing a decrypted version of the packet of encrypted compressed data. The allocation is in response to, and after, reception of the encrypted compressed data. A size of the region of the memory allocated is equal to a size of the packet of encrypted compressed data that is received. The method further includes modifying a configuration of an access authorization filter for defining access rights to the allocated region, decrypting the packet of encrypted compressed data, and storing, in the allocated region, the decrypted compressed data of the packet. The aforementioned allocation, modification, decryption, and storage steps are repeated in response to each new reception of a packet of encrypted compressed data so as to dynamically modify the configuration of the access authorization filter.

Claims (41)

1. A method, comprising:

receiving a data packet comprising encrypted compressed data;

allocating a region of a memory for storing a decrypted version of the encrypted compressed data, wherein allocating the region of the memory is performed in response to, and after, reception of the data packet;

first defining access rights to the region of the memory by modifying a parameter of a configurable access authorization filter coupled to the memory;

decrypting the encrypted compressed data of the data packet to form the decrypted version of the encrypted compressed data;

storing the decrypted version of the encrypted compressed data in the region of the memory; and

repeating the allocating, the first defining, the decrypting, and the storing at least once in response to each new reception of subsequent data packets comprising further encrypted compressed data so as to dynamically modify the parameter of the configurable access authorization filter with each new reception of the subsequent data packets.

2. The method of claim 1 , wherein the decrypted version of the encrypted compressed data comprises decrypted and compressed data.

3. The method of claim 1 , wherein a size of the region of the memory allocated for storing the decrypted version of the encrypted compressed data is equal to a size of the encrypted compressed data that is received.

4. The method of claim 1 , wherein first defining access rights to the region of the memory by modifying the parameter of the configurable access authorization filter comprises modifying at least one parameter of a graph modelling memory storage regions of the memory.

5. The method of claim 1 , further comprising disabling an allocation of any region of the memory to store the decrypted version of the encrypted compressed data at a power-up of an electronic device comprising the memory.

6. A method comprising:

receiving a data packet comprising encrypted compressed data;

allocating a region of a memory for storing a decrypted version of the encrypted compressed data, wherein allocating the region of the memory is performed in response to, and after, reception of the data packet;

first defining access rights to the region of the memory by modifying a parameter of a configurable access authorization filter coupled to the memory;

decrypting the encrypted compressed data of the data packet to form the decrypted version of the encrypted compressed data;

storing the decrypted version of the encrypted compressed data in the region of the memory; and

repeating the allocating, the first defining, the decrypting, and the storing at least once in response to each new reception of subsequent data packets comprising further encrypted compressed data so as to dynamically modify the parameter of the configurable access authorization filter with each new reception of the subsequent data packets, wherein first defining access rights to the region of the memory by modifying the parameter of the configurable access authorization filter comprises identifying one or more first electronic circuits authorized to access the region of the memory storing the decrypted version of the encrypted compressed data.

7. The method of claim 6 , further comprising second defining access rights of one or more second electronic circuits in communication with the one or more first electronic circuits authorized to access the region of the memory storing the decrypted version of the encrypted compressed data.

8. The method of claim 7 , further comprising repeating the second defining with the allocating, the first defining, the decrypting, and the storing at least once in response to each new reception of the subsequent data packets.

9. The method of claim 7 , wherein second defining access rights of one or more second electronic circuits in communication with the one or more first electronic circuits comprises identifying the one or more second electronic circuits authorized to communicate with the one or more first electronic circuits.

10. The method of claim 7 , wherein identifying the one or more first electronic circuits authorized to access the region of the memory storing the decrypted version of the encrypted compressed data comprises identifying the one or more first electronic circuits authorized to read from or write to the region of the memory storing the decrypted version of the encrypted compressed data.

11. A device, comprising:

an input terminal configured to receive a data packet comprising encrypted compressed data;

a decryption circuit configured to decrypt the encrypted compressed data of the data packet to form a decrypted version of the encrypted compressed data;

a memory comprising a region for storing the decrypted version of the encrypted compressed data;

and

a processor coupled to the memory and configured to:

allocate the region of a memory for storing the decrypted version of the encrypted compressed data, wherein allocating the region of the memory is performed in response to, and after, reception of the data packet at the input terminal;

first define access rights to the region of the memory by modifying a configurable access authorization filter parameter;

store the decrypted version of the encrypted compressed data in the region of the memory; and

repeat the allocating, the first defining, the decrypting, and the storing at least once in response to each new reception of subsequent data packets comprising further encrypted compressed data so as to dynamically modify the configurable access authorization filter parameter with each new reception of the subsequent data packets.

12. The device of claim 11 , wherein the decrypted version of the encrypted compressed data comprises decrypted and compressed data.

13. The device of claim 11 , wherein a size of the region of the memory allocated for storing the decrypted version of the encrypted compressed data is equal to a size of the encrypted compressed data that is received.

14. The device of claim 11 , wherein the processor is further configured to disable an allocation of any region of the memory to store the decrypted version of the encrypted compressed data at a power-up of the device.

15. The device of claim 11 , wherein the processor is configured to first define access rights to the region of the memory by modifying the configurable access authorization filter parameter by modifying at least one parameter of a graph modelling memory storage regions of the memory.

16. The device of claim 11 , wherein the processor is configured to first define access rights to the region of the memory by modifying the configurable access authorization filter parameter by identifying one or more first electronic circuits authorized to access the region of the memory storing the decrypted version of the encrypted compressed data.

17. The device of claim 16 , wherein the processor is further configured to second define access rights of one or more second electronic circuits in communication with the one or more first electronic circuits authorized to access the region of the memory storing the decrypted version of the encrypted compressed data.

18. The device of claim 17 , wherein the processor is further configured to repeat the second defining with the allocating, the first defining, the decrypting, and the storing at least once in response to each new reception of the subsequent data packets.

19. The device of claim 17 , wherein the processor is configured to second define access rights of one or more second electronic circuits in communication with the one or more first electronic circuits by identifying the one or more second electronic circuits authorized to communicate with the one or more first electronic circuits.

20. The device of claim 17 , wherein identifying the one or more first electronic circuits authorized to access the region of the memory storing the decrypted version of the encrypted compressed data comprises identifying the one or more first electronic circuits authorized to read from or write to the region of the memory storing the decrypted version of the encrypted compressed data.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2023
From: STMICROELECTRONICS (GRENOBLE 2) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 063282/0095 →
Priority Claims (1)
FR 14 62880 · Dec 19, 2014 · national
Continuity (2)
Continuation 14840132 · Aug 31, 2015
Related Publication 20180293178A1 · Oct 11, 2018