IP Library Granted Patent US 10,283,525
Granted Patent B2
US 10,283,525 · App. 15/995,407 · Granted May 7, 2019

Non-volatile memory device having at least one metal and one semiconductor body extending through an electrode stack

Inventors: Masaki Tsuji (Yokkaichi, JP); Yoshiaki Fukuzumi (Yokkaichi, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L27/11582H01L27/11524H01L27/11529H01L27/11531H01L27/11556H01L27/11565H01L27/11578H01L27/11597H01L29/66666H01L29/66833H01L29/7926
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Quick Facts
Patent No.
US 10,283,525
App. No.
15/995,407
Granted
May 7, 2019
Kind
B2
Abstract

According to an embodiment, a non-volatile memory device includes a first conductive layer, electrodes, an interconnection layer and at least one semiconductor layer. The electrodes are arranged between the first conductive layer and the interconnection layer in a first direction perpendicular to the first conductive layer. The interconnection layer includes a first interconnection and a second interconnection. The semiconductor layer extends through the electrodes in the first direction, and is electrically connected to the first conductive layer and the first interconnection. The device further includes a memory film between each of the electrodes and the semiconductor layer, and a conductive body extending in the first direction. The conductive body electrically connects the first conductive layer and the second interconnection, and includes a first portion and a second portion connected to the second interconnection. The second portion has a width wider than the first portion.

Claims (46)

1. A non-volatile memory device comprising:

a substrate;

an insulation film provided above the substrate;

a first conductive layer provided above the insulation film;

an upper interconnect structure including a first interconnection and a second interconnection;

electrodes provided between the first conductive layer and the upper interconnect structure, the electrodes being arranged in a first direction perpendicular to the first conductive layer to constitute a stacked structure and functioning control gates for memory cells;

at least one semiconductor body extending through the electrodes in the first direction and having a circular shape in a cross section orthogonal to the first direction, one end of the semiconductor body being electrically connected to the first conductive layer, and the other end of the semiconductor body being electrically connected to the first interconnection;

a core film provided inside the circular shape semiconductor body; and

a conductive body extending in the first direction between the first conductive layer and the second interconnection, and electrically connecting the first conductive layer and the second interconnection,

the conductive body including a metal portion positioned at a same level in the first direction as the stacked structure of the electrodes, an outer diameter of the circular shape semiconductor body being smaller than a width of the metal portion of the conductive body at a same level in the first direction, the width being along a second direction orthogonal to the first direction.

2. The device according to claim 1 , wherein each of the electrodes extends in a third direction orthogonal to the first direction and the second direction.

3. The device according to claim 2 , wherein

the second interconnection extends in the third direction; and

the first interconnection extends in the second direction.

4. The device according to claim 1 , wherein

the conductive body includes a first part proximal to the first conductive layer and a second part distal to the first conductive layer, the second part having a width wider than a width of the first part along the second direction.

5. The device according to claim 4 , wherein

the first part has a length in the first direction shorter than an interval between the first conductive layer and one of the electrodes closest to the first conductive layer among the electrodes.

6. The device according to claim 1 , wherein the metal portion contains tungsten.

7. The device according to claim 1 , wherein the core film is insulative.

8. The device according to claim 1 , wherein each of the electrodes is a polycrystalline silicon film or a metal film.

9. The device according to claim 1 , wherein the first conductive layer functions a source layer.

10. The device according to claim 1 , wherein the first conductive layer includes a polycrystalline silicon film.

11. A non-volatile memory device comprising:

a substrate;

an insulation film provided above the substrate;

a first conductive layer provided above the insulation film;

an upper interconnect structure including a first interconnection and a second interconnection;

electrodes provided between the first conductive layer and the upper interconnect structure, the electrodes being arranged in a first direction perpendicular to the first conductive layer to constitute a stacked structure and functioning control gates for memory cells;

at least one semiconductor body extending through the electrodes in the first direction, and having a circular shape in a cross section orthogonal to the first direction, one end of the semiconductor body being electrically connected to the first conductive layer, and the other end of the semiconductor body being electrically connected to the first interconnection;

a core film provided inside the circular shape semiconductor body; and

a conductive body extending in the first direction between the first conductive layer and the second interconnection, and electrically connecting the first conductive layer and the second interconnection,

the conductive body including a metal portion positioned at a same level in the first direction as the stacked structure of the electrodes, an outer diameter of the circular shape semiconductor body being smaller than both of a first dimension and a second dimension of the metal portion of the conductive body at a same level in the first direction, the first dimension being along a second direction orthogonal to the first direction and the second dimension being along a third direction orthogonal to the first direction and the second direction.

12. The device according to claim 11 , wherein each of the electrodes extends in the third direction.

13. The device according to claim 12 , wherein

the second interconnection extends in the third direction; and

the first interconnection extends in the second direction.

14. The device according to claim 11 , wherein

the conductive body includes a first part proximal to the first conductive layer and a second part distal to the first conductive layer, the second part having a width wider than a width of the first part along the second direction.

15. The device according to claim 14 , wherein

the first part has a length in the first direction shorter than an interval between the first conductive layer and one of the electrodes closest to the first conductive layer among the electrodes.

16. The device according to claim 11 , wherein the metal portion contains tungsten.

17. The device according to claim 11 , wherein the core film is insulative.

18. The device according to claim 11 , wherein each of the electrodes is a polycrystalline silicon film or a metal film.

19. The device according to claim 11 , wherein the first conductive layer functions a source layer.

20. The device according to claim 11 , wherein the first conductive layer includes a polycrystalline silicon film.

Assignments (3)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
Continuity (4)
Continuation 15679301 · Aug 17, 2017
Continuation 14643056 · Mar 10, 2015
Provisional Application 62047350 · Sep 8, 2014
Related Publication 20180286882A1 · Oct 4, 2018