Passive local area saturation of electron bombarded gain
Methods and systems to intensify an image, such as in a night vision apparatus, include a semi-conductor structure that includes a first region that is doped to generate a plurality of electrons and corresponding holes for each electron that impinges a reception surface of the semi-conductor structure, a second region that is doped to attract the holes, an electrically conductive region to output the holes from the second region, and a third region that is doped to restrict a flow of the holes from the second region to the electrically conductive region such that some of the holes will combine with some of the plurality of electrons within the first region. The first region further includes an emission area from which to emit remaining ones of the plurality of electrons.
1. An apparatus, comprising:
a semiconductor structure that includes,
an electron multiplier region that is doped to generate a plurality of electrons and corresponding holes for each electron that impinges a reception surface of the semi-conductor structure;
a blocking region that is doped to attract the holes;
an electrically conductive region to output the holes from the blocking region; and
a restriction region that is doped to restrict a flow of the holes from the blocking region to the electrically conductive region such that some of the holes will combine with some of the plurality of electrons within the electron multiplier region;
wherein the electron multiplier region includes an emission area from which to emit remaining ones of the plurality of electrons.
2. The apparatus of claim 1 , wherein:
the blocking region and the electron multiplier region are doped with a P-type dopant;
the blocking region is more heavily doped than the electron multiplier region; and
the restriction region is doped with an N-type dopant.
3. The apparatus of claim 1 , wherein:
the blocking region extends from the emission surface of the semiconductor structure towards the reception surface of the semiconductor structure; and
the restriction region is within the blocking region.
4. The apparatus of claim 1 , wherein:
the blocking region includes a plurality of blocking regions, each doped to repel the plurality of electrons towards respective adjacent emissions areas of the emission surface of the semiconductor structure;
the electrically conductive region includes a plurality of electrically conductive regions to output holes from respective ones of the blocking regions; and
the restriction region includes a plurality of restriction regions, each doped to restrict the flow of the holes from respective ones of the blocking region to respective ones of the electrically conductive regions.
5. The apparatus of claim 4 , wherein:
the plurality of blocking regions include multiple rows of blocking channels that extend from the emission surface of the semiconductor structure toward the reception surface of the semiconductor structure;
the plurality of restriction regions include multiple restriction channels, each positioned within a respective one of the blocking channels; and
the plurality of electrically conductive regions are disposed over respective ones of the restriction channels.
6. The apparatus of claim 5 , wherein:
the multiple rows of blocking channels includes a first and second rows of blocking channels; and
the first row of blocking channels is perpendicular to the second row of blocking channels.
7. The apparatus of claim 1 , wherein the semiconductor substrate is configured as an array of similarly-configured cells, and wherein an emission surface of a first one of the cells includes:
the electrically conductive region disposed over the restriction region;
the blocking region disposed within the electrically conductive region; and
the emission area within the blocking region.
8. The apparatus of claim 1 , further including:
a photo-cathode to convert protons to electrons and to direct the electrons toward the reception surface of the semiconductor structure; and
an anode to receive the plurality of electrons from the semiconductor structure.
9. A method, comprising:
generating a plurality of free electrons and corresponding holes for each electron that impinges an input surface of a semiconductor structure, within a doped electron multiplier region of the semiconductor structure;
attracting the holes to a doped blocking region of the semiconductor structure;
outputting the holes from the doped blocking region through an electrically conductive region of the semiconductor structure;
restricting a flow of the holes from the doped blocking region to the electrically conductive region, in a doped restriction region of the semiconductor structure, to cause some of the holes to combine with some of the plurality of free electrons within the electron multiplier region of the semiconductor structure; and
emitting remaining ones of the plurality of free electrons from an emission area of the doped electron multiplier region.
10. The method of claim 9 , wherein:
the blocking region and the electron multiplier region are doped with a P-type dopant;
the blocking region is more heavily doped than the electron multiplier region; and
the restriction region is doped with an N-type dopant.
11. The method of claim 9 , wherein:
the blocking region extends from the emission surface of the semiconductor structure towards the reception surface of the semiconductor structure; and
the restriction region is within the blocking region.
12. The method of claim 9 , wherein:
the blocking region includes a plurality of blocking regions, each doped to repel the plurality of electrons towards respective adjacent emissions areas of the emission surface of the semiconductor structure;
the electrically conductive region includes a plurality of electrically conductive regions to output holes from respective ones of the blocking regions; and
the restriction region includes a plurality of restriction regions, each doped to restrict the flow of the holes from respective ones of the blocking region to respective ones of the electrically conductive regions.
13. The method of claim 12 , wherein:
the plurality of blocking regions include multiple rows of blocking channels that extend from the emission surface of the semiconductor structure toward the reception surface of the semiconductor structure;
the plurality of restriction regions include multiple restriction channels, each positioned within a respective one of the blocking channels; and
the plurality of electrically conductive regions are disposed over respective ones of the restriction channels.
14. The method of claim 13 , wherein:
the multiple rows of blocking channels includes a first and second rows of blocking channels; and
the first row of blocking channels is perpendicular to the second row of blocking channels.
15. The method of claim 9 , wherein the semiconductor substrate is configured as an array of similarly-configured cells, and wherein an emission surface of a first one of the cells includes:
the electrically conductive region disposed over the restriction region;
the blocking region disposed within the electrically conductive region; and
the emission area within the blocking region.
16. The method of claim 9 , further including:
converting protons to electrons with a photo-cathode;
directing the electrons from the photo-cathode toward the reception surface of the semiconductor structure; and
receiving the plurality of electrons from the semiconductor structure at an anode.