Controller for recovering map segments in case of sudden power off and operating method thereof

1. A controller, comprising:

a memory suitable for caching write data and map data corresponding to the write data; and

a processor suitable for:

flushing map segment including the map data into a memory device, when a size of the cached map data is equal to a segment unit;

storing a group of the write data, which corresponds to the flushed map segment in the memory device after the flushing;

updating the map segment based on physical address information of the group of the write data; and

flushing the updated map segment into the memory device,

wherein the map data includes location information of the write data,

wherein the processor recovers map segments for all write data stored in the memory device when sudden power-off (SPO) occurs, and

wherein if a last-flushed map segment includes map data having the location information indicating that the write data is stored in the memory, the processor recovers the map segments in a reverse order starting from a map segment flushed prior to the last-flushed map segment.

2. The controller of claim 1 , wherein the processor flushes the map data in a round-robin scheme.

3. The controller of claim 1 , wherein the processor recovers the map segments by reading the write data stored in the memory device.

4. The controller of claim 1 , wherein the processor recovers the map segments in the reverse order starting from map data corresponding to write data which is last stored in the memory device.

5. An operating method of a controller, comprising:

caching write data and map data corresponding to the write data into a memory;

flushing map segment including the map data into a memory device when a size of the cached map data is equal to a segment unit;

storing a group of the write data which corresponds to the flushed map segment in the memory device after the flushing;

updating the map segment based on physical address information of the stored group of the write data;

flushing the updated map segment into the memory device; and

recovering map segments for all write data stored in the memory device when sudden power-off (SPO) occurs,

wherein the map data includes location information of the write data, and

wherein the recovering of the map segments includes recovering the map segments in a reverse order starting from a map segment flushed prior to a last-flushed map segment, if the last-flushed map segment includes map data having the location information indicating that the write data is stored in the memory.

6. The operating method of claim 5 , wherein the flushing of the cached map data flushes the map data in a round-robin scheme.

7. The operating method of claim 5 , wherein the recovering of the map segments reads the write data stored in the memory device.

8. The operating method of claim 5 ,

wherein the recovering of the map segments includes recovering map data in the reverse order starting from map data corresponding to write data which is last stored in the memory device.

9. A memory system, comprising:

a memory device; and

a controller suitable for:

caching write data and map data corresponding to the write data,

flushing map segment including the map data into the memory device, when a size of the cached map data is equal to a segment unit;

storing a group of the write data, which corresponds to the flushed map segment in the memory device after the flushing;

updating the map segment based on physical address information of the group of the write data; and

flushing the updated map segment into the memory device,

wherein the map data includes location information of the write data,

wherein the processor recovers map segments for all write data stored in the memory device when sudden power-off (SPO) occurs, and

wherein if a last-flushed map segment includes map data having the location information indicating that the write data is stored in the memory, the processor recovers the map segments in a reverse order starting from a map segment flushed prior to the last-flushed map segment.

10. The memory system of claim 9 , wherein the processor recovers the map segments by reading the write data stored in the memory device.