IP Library Granted Patent US 10,742,675
Granted Patent B2
US 10,742,675 · App. 16/013,239 · Granted Aug 11, 2020

Fraudulent message detection device, electronic control apparatus equipped with fraudulent message detection device, fraudulent message detection method, and fraudulent message detection program

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Quick Facts
Patent No.
US 10,742,675
App. No.
16/013,239
Granted
Aug 11, 2020
Kind
B2
Abstract

Provided is a fraudulent message detection device that detects a fraudulent message in a bus network and includes: a resynchronization detector that detects an edge of a signal on a bus in the bus network and determines whether to perform resynchronization, so as to adjust a sampling point in a one-bit period; a transmission and receiving control unit that obtains a first logical value and a second logical value in a one-bit period after the resynchronization detector determines to perform the resynchronization, the first logical value being a logical value at a sampling point used before the edge is detected, the second logical value being a logical value at a sampling point after the resynchronization is performed; a comparator that compares the first and second logical values; and a fraud detection processing unit that executes post-fraud-detection processing, when the first and second logical values do not coincide.

Claims (13)

1. A fraudulent message detection device that detects a fraudulent message transmitted to a bus in a bus network, the fraudulent message detection device comprising:

a resynchronization detector that detects an edge of a signal on the bus and determines whether to perform resynchronization based on the edge, so as to adjust a sampling point that is a point in time when a voltage of the bus is read to obtain a logical value of the signal during a one-bit period;

a receiver that obtains a first logical value and a second logical value during the one-bit period after the resynchronization detector determines to perform the resynchronization, the first logical value being a logical value on the bus at the sampling point used before the edge is detected, the second logical value being a logical value on the bus at the sampling point after the resynchronization based on the edge is performed;

a comparator that compares the first logical value and the second logical value obtained by the receiver;

a fraud detection processing unit that executes post-fraud-detection processing associated with a case in which the fraudulent message is detected, when the comparator determines that the first logical value and the second logical value do not coincide;

a first synchronization time holder that holds the sampling point used before the resynchronization detector detects the edge; and

a second synchronization time holder that holds the sampling point that is adjusted by the resynchronization based on the edge detected by the resynchronization,

wherein the receiver obtains the first logical value at the sampling point held by the first synchronization time holder, and the second logical value at the sampling point held by the second synchronization time holder.

2. The fraudulent message detection device according to claim 1 , wherein the fraud detection processing unit transmits a frame to the bus as the post-fraud-detection processing, the frame notifying occurrence of an error in communication on the bus network.

3. The fraudulent message detection device according to claim 1 , wherein the bus network is a controller area network (CAN).

4. The fraudulent message detection device according to claim 1 , wherein the fraudulent message detection device is included in an electronic control unit connected to the bus network.

5. An electronic control unit, comprising:

the fraudulent message detection device according to claim 1 , the electronic control unit being connected to an in-vehicle communication system including communication devices connected via the bus network.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0870 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2018
From: FUJIWARA, MAKOTO
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 046845/0990 →