Semiconductor device
View Patent ↗According to one embodiment, a semiconductor device includes a first gate electrode, a semiconductor layer, a first insulating layer, a second gate electrode, a second insulating layer, a third insulating layer, a first contact hole, and a first electrode. The first electrode passes through the first contact hole and electrically connects the first gate electrode, the first region and the second gate electrode.
1. A semiconductor device comprising:
a first gate electrode;
a semiconductor layer which is provided above the first gate electrode, and includes a first region, a second region and a channel region located between the first region and the second region and facing the first gate electrode;
a first insulating layer provided between the first gate electrode and the semiconductor layer;
a second gate electrode located above the semiconductor layer and facing the channel region;
a second insulating layer provided between the semiconductor layer and the second gate electrode;
a third insulating layer provided above the first insulating layer, the semiconductor layer, the second insulating layer and the second gate electrode;
a first contact hole penetrating the first insulating layer and the third insulating layer, and located in an area facing the first gate electrode, the first region and the second gate electrode; and
a first electrode passing through the first contact hole and electrically connecting the first gate electrode, the first region and the second gate electrode,
wherein
each of the first gate electrode and the second gate electrode is not in direct contact with the semiconductor layer.
2. The semiconductor device of claim 1 , wherein
on a virtual perpendicular surface penetrating the first gate electrode, the first region and the second gate electrode, the first region and the second gate electrode are provided in a staircase pattern and form a difference on an inner peripheral surface of the first contact hole, and
the first electrode is in contact with an upper surface of the first gate electrode, an upper surface of the first region and an upper surface of the second gate electrode.
3. The semiconductor device of claim 1 , further comprising a first conductive layer which is provided on the first region and is in contact with the first region,
wherein
the first contact hole faces the first conductive layer, and
the first electrode is electrically connected to the first conductive layer.
4. The semiconductor device of claim 3 , wherein
on a virtual perpendicular surface penetrating the first gate electrode, the first conductive layer and the second gate electrode, the first conductive layer and the second gate electrode are provided in a staircase pattern and form a difference on an inner peripheral surface of the first contact hole, and
the first electrode is in contact with an upper surface of the first gate electrode, an upper surface of the first conductive layer and an upper surface of the second gate electrode.
5. The semiconductor device of claim 1 , wherein
the semiconductor layer is formed of an oxide semiconductor.
6. A semiconductor device comprising:
a first gate electrode;
a semiconductor layer which is provided above the first gate electrode, and includes a first region, a second region and a channel region located between the first region and the second region and facing the first gate electrode;
a first insulating layer provided between the first gate electrode and the semiconductor layer;
a second gate electrode located above the semiconductor layer and facing the channel region;
a second insulating layer provided between the semiconductor layer and the second gate electrode;
a third insulating layer provided above the first insulating layer, the semiconductor layer, the second insulating layer and the second gate electrode;
a first contact hole penetrating the third insulating layer, and located in an area facing the first region and the second gate electrode;
a first electrode passing through the first contact hole, and electrically connecting the first region and the second gate electrode;
a second contact hole penetrating the first insulating layer and the third insulating layer, and located in an area facing the first gate electrode and the second region; and
a second electrode passing through the second contact hole, and electrically connecting the first gate electrode and the second region,
wherein
each of the first gate electrode and the second gate electrode is not in direct contact with the semiconductor layer.
7. The semiconductor device of claim 6 , wherein
the first electrode is in contact with an upper surface of the first region and an upper surface of the second gate electrode, and
the second electrode is in contact with an upper surface of the first gate electrode and an upper surface of the second region.
8. The semiconductor device of claim 6 , further comprising:
a first conductive layer which is provided on the first region and is in contact with the first region; and
a second conductive layer which is provided on the second region and is in contact with the second region,
wherein
the first contact hole faces the first conductive layer,
the first electrode is electrically connected to the first conductive layer,
the second contact hole faces the second conductive layer, and
the second electrode is electrically connected to the second conductive layer.
9. The semiconductor device of claim 8 , wherein
the first electrode is in contact with an upper surface of the first conductive layer and an upper surface of the second gate electrode, and
the second electrode is in contact with an upper surface of the first gate electrode and an upper surface of the second conductive layer.
10. The semiconductor device of claim 6 , wherein
the semiconductor layer is formed of an oxide semiconductor.