IP Library Granted Patent US 10,839,762
Granted Patent B2
US 10,839,762 · App. 16/026,320 · Granted Nov 17, 2020

Display device

Inventor: Naoki Miyanaga (Minato-ku, JP)
Assignee: Japan Display Inc.
G09G3/3648G02F1/13306G09G3/20G09G3/3677G02F2201/123G02F2201/56G09G2310/0205G09G2310/0267G09G2310/0286G09G2310/08
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Quick Facts
Patent No.
US 10,839,762
App. No.
16/026,320
Granted
Nov 17, 2020
Kind
B2
Abstract

To improve surge tolerance of a shift register constituting a gate signal line driving circuit formed on a substrate of a flat panel display. A gate signal line driving circuit includes a shift register composed of a plurality of cascaded unit register circuits, and sequentially outputs gate signals to a plurality of gate signal lines. Of the unit register circuits, two register circuits positioned on the leading end side for the shift operation of the shift register receive a start signal in parallel to operate. The two register circuits respectively output signals to mutually different destinations such that an output signal from one of the two register circuits is inputted via a gate signal generation circuit to a gate signal line, while an output signal from the other register circuit is inputted into its downstream unit register circuit.

Claims (51)

1. A display device, comprising:

a display area and a peripheral area around the display area, both defined on a substrate;

a plurality of pixels disposed in a matrix in the display area;

a plurality of gate signal lines disposed in the display area, for supplying a gate signal that enables writing of a video signal into the pixel;

a gate signal line driving circuit including a plurality of circuit units connected in cascade and disposed in the peripheral area, each of the circuit units including a register circuit and a gate signal generation circuit, each gate signal generation circuit outputting at least one gate signal to at least one of the plurality of gate signal lines based on an output signal from a corresponding register circuit, each register circuit including a first input terminal connected to an output terminal of a register circuit of another circuit unit; and

a control circuit disposed in the peripheral area, for outputting a control signal to the gate signal line driving circuit, wherein

the gate signal line driving circuit further includes a first circuit unit and a second circuit unit of the plurality of circuit units, both receiving the control signal from the control circuit,

the first input terminal of the register circuit of the first circuit unit and the first input terminal of the register circuit of the second circuit unit are connected in parallel to a start signal line instead of an output terminal of a register circuit of another circuit unit, and receive a start signal as the control signal in parallel from the control circuit via the start signal line,

when the register circuit of the first circuit unit receives the start signal, the register circuit of the first circuit unit supplies the corresponding output signal to an input terminal of another circuit unit, and the gate signal generation circuit of the first circuit unit does not output a gate signal to any of the plurality of gate signal lines, and

when the register circuit of the second circuit unit receives the start signal, the register circuit of the second circuit unit does not supply the corresponding output signal to an input terminal of another circuit unit, and the gate signal generation circuit of the second circuit unit outputs at least one gate signal to at least one gate signal line.

2. The display device according to claim 1 , wherein

the circuit units are disposed in the peripheral area so as to be aligned in a row along the display area,

the first circuit unit is disposed at an end of a cascade of the circuit units, and

the second circuit unit is disposed adjacent to the first circuit unit.

3. The display device according to claim 1 , wherein

the circuit units are disposed in the peripheral area so as to be aligned in a row along the display area,

the second circuit unit is disposed at an end of a cascade of the circuit units, and

the first circuit unit is disposed adjacent to the second circuit unit.

4. The display device according to claim 1 , wherein each register circuit includes a second input terminal connected to an output terminal of a register circuit of another circuit unit,

the gate signal line driving circuit further includes a third circuit unit and a fourth circuit unit as the circuit unit of the plurality of circuit units, both receiving the control signal from the control circuit,

the second input terminal of the register circuit of the third circuit unit and the second input terminal of the register circuit of the fourth circuit unit are connected in parallel to the start signal line instead of an output terminal of a register circuit of another circuit unit, and receive a start signal as the control signal in parallel from the control circuit via the start signal line,

when the register circuit of the third circuit unit receives the start signal, the register circuit of the third circuit unit supplies the corresponding output signal to an input terminal of another circuit unit, and the gate signal generation circuit of the third circuit unit does not output a gate signal to any of the plurality of gate signal lines, and

when the register circuit of the fourth circuit unit receives the start signal, the register circuit of the fourth circuit unit does not supply the corresponding output signal to an input terminal of another circuit unit, and the gate signal generation circuit of the fourth circuit unit outputs at least one gate signal to at least one gate signal line.

5. The display device according to claim 4 , wherein

the circuit units are disposed in the peripheral area so as to be aligned in a row along the display area,

the first circuit unit is disposed at an end of a cascade of the circuit units,

the second circuit unit is disposed adjacent to the first circuit unit,

the third circuit unit is disposed at another end of the cascade of the circuit units, and

the fourth circuit unit is disposed adjacent to the third circuit unit.

6. The display device according to claim 4 , wherein

the circuit units are disposed in the peripheral area so as to be aligned in a row along the display area,

the second circuit unit is disposed at an end of a cascade of the circuit units,

the first circuit unit is disposed adjacent to the second circuit unit,

the fourth circuit unit is disposed at another end of the cascade of the circuit units, and

the third circuit unit is disposed adjacent to the fourth circuit unit.

7. The display device according to claim 4 , wherein

the gate signal line driving circuit and the control circuit constitute a bidirectional shift register, and

the control circuit inputs the control signal to either the first circuit unit and the second circuit unit or the third circuit unit and the fourth circuit unit.

8. The display device according to claim 1 , wherein

an edge of the display area includes a curved portion in a plan view, and

the first circuit unit and the second circuit unit are disposed so as to be aligned along the curved portion.

9. The display device according to claim 4 , wherein

an edge of the display area includes a curved portion in a plan view, and

the third circuit unit and the fourth circuit unit are disposed so as to be aligned along the curved portion.

10. The display device according to claim 1 , wherein the gate signal generation circuit generates a plurality of the gate signals, based on output signals from the register circuits, and outputs the plurality of gate signals to the plurality of the gate signal lines.

11. The display device according to claim 1 , further comprising:

a clock line separately from the start signal line, the clock line transmitting a clock signal from the control circuit, wherein

the register circuit of the first circuit unit includes a first transistor connected to the clock line,

the register circuit of the second circuit unit includes a second transistor connected to the clock line, and

the first transistor and the second transistor have different channel types mutually.

12. The display device according to claim 1 , wherein the gate signal generation circuit of the first circuit unit has no line that transmits the gate signal to another circuit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2018
From: MIYANAGA, NAOKI
To: JAPAN DISPLAY INC.
Reel/Frame 046473/0285 →