Methods of forming an array of cross point memory cells
A method of forming an array of cross point memory cells comprises forming spaced conductive lower electrode pillars for individual of the memory cells being formed along and elevationally over spaced lower first lines. Walls cross elevationally over the first lines and between the electrode pillars that are along the first lines. The electrode pillars and walls form spaced openings between the first lines. The openings are lined with programmable material of the memory cells being formed to less-than-fill the openings with the programmable material. Conductive upper electrode material is formed over the programmable material within remaining volume of the openings and spaced upper second lines are formed which cross the first lines elevationally over the conductive upper electrode material that is within the openings. A select device is between the lower electrode pillar and the underlying first line or is between the conductive upper electrode material and the overlying second line for the individual memory cells. Aspects of the invention include an array of cross point memory cells independent of method of manufacture.
1. A method of forming an array of cross point memory cells, comprising:
forming spaced lower electrode pillars for individual ones of the array of cross point memory cells being formed along and elevationally over spaced lower first lines, walls crossing elevationally over the spaced lower first lines and between the spaced lower electrode pillars that are along the spaced lower first lines, the spaced lower electrode pillars and the walls forming spaced openings between the spaced lower first lines;
lining the spaced openings with programmable material of the array of cross point memory cells being formed to less-than-fill the spaced openings with the programmable material; and
forming conductive upper electrode material over the programmable material within remaining volume of the spaced openings and forming spaced upper second lines which cross over the spaced lower first lines elevationally over the conductive upper electrode material that is within the spaced openings, a select device being between the spaced lower electrode pillars and the spaced lower first lines or being between the conductive upper electrode material and the spaced upper second lines for the individual ones of the array of cross point memory cells.
2. The method of claim 1 wherein the conductive upper electrode material is formed to fill all of the remaining volume of the spaced openings.
3. The method of claim 2 wherein the conductive upper electrode material is formed to overfill all of the remaining volume of the spaced openings.
4. The method of claim 1 wherein the select device is between the conductive upper electrode material and individual ones of the spaced upper second lines for the individual ones of the array of cross point memory cells.
5. The method of claim 1 wherein the select device is between individual ones of the spaced lower electrode pillars and the spaced lower first lines.
6. The method of claim 5 comprising masking steps; the forming of all of the spaced lower first lines, the spaced lower electrode pillars, the spaced upper second lines, and the select devices using only three masking steps.
7. The method of claim 1 comprising forming the programmable material over tops of the spaced lower electrode pillars and which remains in a finished construction of the array of cross point memory cells.
8. The method of claim 7 comprising forming the conductive upper electrode material elevationally over the programmable material that is over the tops of the spaced lower electrode pillars and which remains in the finished construction.
9. The method of claim 7 wherein the programmable material is continuous over multiple of the tops and sidewalls of the spaced lower electrode pillars and beneath the conductive upper electrode material.
10. The method of claim 1 wherein the select device is a diode.