IP Library Granted Patent US 10,913,368
Granted Patent B2
US 10,913,368 · App. 16/038,569 · Granted Feb 9, 2021

PWM capacitor control

Inventors: Andre B. Kurs (Chestnut Hill, MA); Milisav Danilovic (Watertown, MA)
Assignee: WiTricity Corporation
B60L53/12H02J50/12H03H7/40H03H11/28H03K5/1536H03K7/08H03K17/284
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Quick Facts
Patent No.
US 10,913,368
App. No.
16/038,569
Granted
Feb 9, 2021
Kind
B2
Abstract

Methods, systems, and devices for controlling a variable capacitor. One aspect features a variable capacitance device that includes a capacitor, a first transistor, a second transistor, and control circuitry. The control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations including detecting a zero-crossing of an input current at a first time. Switching off the first transistor. Estimating a first delay period for switching the first transistor on when a voltage across the capacitor is zero. Switching on the first transistor after the first delay period from the first time. Detecting a zero-crossing of the input current at a second time. Switching off the second transistor. Estimating a second delay period for switching the second transistor on when a voltage across the capacitor is zero. Switching on the second transistor after the second delay period from the second time.

Claims (60)

1. A variable capacitance device comprising:

a capacitor;

a first transistor comprising a first-transistor first terminal, a first-transistor second terminal, and a first-transistor gate terminal, the first-transistor first terminal electrically connected to a first terminal of the capacitor;

a second transistor comprising a second-transistor first terminal, a second-transistor second terminal, and a second-transistor a gate terminal, the second-transistor first terminal electrically connected to a second terminal of the capacitor, and the second-transistor second terminal electrically connected to the first-transistor second terminal; and

control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal, wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:

generating an alternating ramp signal having peaks and troughs that are timed to correspond with zero-crossings of an input current, and

switching off the first transistor in response to the ramp signal crossing a first reference value; and

switching on the first transistor following a fixed time delay after the ramp signal crosses the first reference value following a peak or trough in the ramp signal.

2. The device of claim 1 , wherein the first and second transistors are selected from the group consisting of: silicon MOSFET transistors, silicon carbide MOSFET transistors, or gallium nitride MOSFET transistors.

3. The device of claim 1 , wherein the capacitor is electrically connected to an impedance matching system.

4. The device of claim 1 , wherein operations comprise:

switching off the second transistor following a second fixed time delay after the ramp signal crosses a second reference value; and

switching on the second transistor in response to the ramp signal crossing the second reference value following a second peak or trough in the ramp signal.

5. A variable capacitance device comprising:

a capacitor;

a first transistor comprising a first-transistor first terminal, a first-transistor second terminal, and a first-transistor gate terminal, the first-transistor first terminal electrically connected to a first terminal of the capacitor;

a second transistor comprising a second-transistor first terminal, a second-transistor second terminal, and a second-transistor a gate terminal, the second-transistor first terminal electrically connected to a second terminal of the capacitor, and the second-transistor second terminal electrically connected to the first-transistor second terminal; and

control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal, wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:

generating an alternating ramp signal having peaks and troughs that are timed to correspond with zero-crossings of an input current,

switching off the first transistor in response to the ramp signal crossing a first reference value when the ramp signal has a first slope;

switching on the first transistor in response to the ramp signal crossing the first reference value when the ramp signal has a second slope;

switching off the second transistor in response to the ramp signal crossing a second reference value when the ramp signal has the second slope; and

switching on the second transistor in response to the ramp signal crossing the second reference value when the ramp signal has the first slope.

6. The device of claim 5 , wherein the effective capacitance of the capacitor is controlled by the first and second reference values.

7. The device of claim 5 , wherein the second reference value has a value that is the negative of the first reference value.

8. The device of claim 5 , wherein the operations comprise switching on the first transistor after the ramp signal crosses the first reference value and in response to a zero-voltage condition across the capacitor.

9. The device of claim 5 , wherein the first and second transistors are selected from the group consisting of: silicon MOSFET transistors, silicon carbide MOSFET transistors, or gallium nitride MOSFET transistors.

10. The device of claim 5 , wherein the capacitor is electrically connected to an impedance matching system.

11. A high-power wireless energy transfer system comprising:

a variable capacitance device comprising:

a capacitor;

a first transistor comprising a first-transistor first terminal, a first-transistor second terminal, and a first-transistor gate terminal, the first-transistor first terminal electrically connected to a first terminal of the capacitor;

a second transistor comprising a second-transistor first terminal, a second-transistor second terminal, and a second-transistor a gate terminal, the second-transistor first terminal electrically connected to a second terminal of the capacitor, and the second-transistor second terminal electrically connected to the first-transistor second terminal; and

control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal, wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:

generating an alternating ramp signal having peaks and troughs that are timed to correspond with zero-crossings of an input current, and

switching off the first transistor in response to the ramp signal crossing a first reference value; and

switching on the first transistor following a fixed time delay after the ramp signal crosses the first reference value following a peak or trough in the ramp signal; and

an inductive coil electrically coupled to the variable capacitance.

12. The system of claim 11 , wherein operations comprise:

switching off the second transistor following a second fixed time delay after the ramp signal crosses a second reference value; and

switching on the second transistor in response to the ramp signal crossing the second reference value following a second peak or trough in the ramp signal.

13. The system of claim 11 , wherein the first and second transistors are selected from the group consisting of: silicon MOSFET transistors, silicon carbide MOSFET transistors, or gallium nitride MOSFET transistors.

14. The system of claim 11 , wherein the capacitor is electrically connected to an impedance matching system.

15. A high-power wireless energy transfer system comprising:

a variable capacitance device comprising:

a capacitor;

a first transistor comprising a first-transistor first terminal, a first-transistor second terminal, and a first-transistor gate terminal, the first-transistor first terminal electrically connected to a first terminal of the capacitor;

a second transistor comprising a second-transistor first terminal, a second-transistor second terminal, and a second-transistor a gate terminal, the second-transistor first terminal electrically connected to a second terminal of the capacitor, and the second-transistor second terminal electrically connected to the first-transistor second terminal; and

control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal, wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:

generating an alternating ramp signal having peaks and troughs that are timed to correspond with zero-crossings of an input current,

switching off the first transistor in response to the ramp signal crossing a first reference value when the ramp signal has a first slope;

switching on the first transistor in response to the ramp signal crossing the first reference value when the ramp signal has a second slope;

switching off the second transistor in response to the ramp signal crossing a second reference value when the ramp signal has the second slope; and

switching on the second transistor in response to the ramp signal crossing the second reference value when the ramp signal has the first slope; and

an inductive coil electrically coupled to the variable capacitance.

16. The system of claim 15 , wherein the second reference value has a value that is the negative of the first reference value.

17. The system of claim 15 , wherein the first and second transistors are selected from the group consisting of: silicon MOSFET transistors, silicon carbide MOSFET transistors, or gallium nitride MOSFET transistors.

18. The system of claim 15 , wherein the capacitor is electrically connected to an impedance matching system.

19. The system of claim 15 , wherein the second reference value has a value that is the negative of the first reference value.

20. The system of claim 15 , wherein the operations comprise switching on the first transistor after the ramp signal crosses the first reference value and in response to a zero-voltage condition across the capacitor.

Assignments (4)
ASSIGNMENT OF SECURITY INTEREST Recorded Dec 18, 2025
From: AIR WAVES WIRELESS ELECTRICITY IV, LLC
To: WITRICITY AI TECH, LLC
Reel/Frame 074004/0929 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2025
From: WITRICITY CORPORATION
To: WITRICITY AI TECH, LLC
Reel/Frame 073982/0106 →
SECURITY INTEREST Recorded Dec 5, 2025
From: WITRICITY CORPORATION; WITRICITY HOLDINGS, INC.
To: AIR WAVES WIRELESS ELECTRICITY IV, LLC, AS COLLATERAL AGENT FOR LENDERS
Reel/Frame 073860/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 19, 2018
From: KURS, ANDRE B.; DANILOVIC, MILISAV
To: WITRICITY CORPORATION
Reel/Frame 046392/0575 →
Cited By (1)
US 12,626,851