IP Library Granted Patent US 10,522,461
Granted Patent B2
US 10,522,461 · App. 16/042,255 · Granted Dec 31, 2019

Semiconductor device structures

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Quick Facts
Patent No.
US 10,522,461
App. No.
16/042,255
Granted
Dec 31, 2019
Kind
B2
Abstract

A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of acidic or basic material and the substrate structure. The acidic or basic material is diffused from the pools into portions of the resist proximal to the pools more than into portions of the resist distal to the pools. Then, the resist is exposed to a developer to remove a greater amount of the resist portions proximal to the pools compared to the resist portions distal to the pools to form openings in the resist. The openings have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure. The method may further comprise forming features in the openings of the resist. The features have wider portions proximal to the substrate structure and narrower portions distal to the substrate structure.

Claims (21)

1. A semiconductor device structure, comprising:

periodic conductive features on a material, each of the periodic conductive features spaced at the same pitch, a narrower portion, and a wider portion, the narrower portion of each of the periodic conductive features proximal to the material and the wider portion of each of the periodic conductive features distal to the material.

2. The semiconductor device structure of claim 1 , wherein the periodic conductive features comprise a metal, polysilicon, or combinations thereof.

3. The semiconductor device structure of claim 1 , wherein the periodic conductive features comprise an oxide.

4. The semiconductor device structure of claim 1 , wherein the periodic conductive features comprise a dimension of less than approximately 40 nm.

5. The semiconductor device structure of claim 1 , wherein the periodic conductive features comprise sloped sidewalls.

6. A semiconductor device structure, comprising:

conductive features on a material, each of the conductive features comprising a narrower portion and a wider portion, the narrower portion of each of the conductive features distal to the material and the wider portion of each of the conductive features proximal to the material, the wider portion of the conductive features in direct contact with the material.

7. The semiconductor device structure of claim 6 , wherein the material comprises a semiconductive material, a metal material, or combinations thereof.

8. The semiconductor device structure of claim 6 , wherein the material comprises silicon, silicon-germanium, germanium, gallium arsenide, gallium nitride, indium phosphide, or combinations thereof.

9. The semiconductor device structure of claim 6 , wherein a distal portion of the conductive features comprises a narrower diameter than the proximal portion.

10. The semiconductor device structure of claim 6 , wherein the conductive features comprise sloped sidewalls comprising a non-uniform slope.

11. The semiconductor device structure of claim 6 , wherein the conductive features comprise sloped sidewalls comprising a substantially uniform slope.

12. The semiconductor device structure of claim 6 , wherein the conductive features comprise contacts having a diameter of less than approximately 40 nm.

13. The semiconductor device structure of claim 6 , wherein the conductive features comprise the same pitch.

14. The semiconductor device structure of claim 6 , wherein the conductive features are evenly spaced.

15. A semiconductor device structure, comprising:

conductive features directly on a material, each of the conductive features comprising a tapered profile and a dimension of less than approximately 40 nm.

16. The semiconductor device structure of claim 15 , wherein the conductive features comprise a length of from approximately 5 nm to approximately 40 nm and a width of from approximately 5 nm to approximately 40 nm.

17. The semiconductor device structure of claim 15 , wherein the tapered profile of the conductive features comprises a narrower portion distal to the material and a wider portion proximal to the material.

18. The semiconductor device structure of claim 15 , wherein the tapered profile of the conductive features comprises a wider portion distal to the material and a narrower portion proximal to the material.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 14, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051028/0835 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050719/0550 →
SUPPLEMENT NO. 1 TO PATENT SECURITY AGREEMENT Recorded Nov 13, 2018
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A.., AS COLLATERAL AGENT
Reel/Frame 047630/0756 →
SUPPLEMENT NO. 10 TO PATENT SECURITY AGREEMENT Recorded Nov 13, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048102/0420 →