IP Library Granted Patent US 10,922,222
Granted Patent B2
US 10,922,222 · App. 16/044,946 · Granted Feb 16, 2021

Data processing system and operating method for generating physical address update history

Inventor: Jeen Park (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G06F12/0246G11C16/349G11C29/00G06F2212/7201
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Quick Facts
Patent No.
US 10,922,222
App. No.
16/044,946
Granted
Feb 16, 2021
Kind
B2
Abstract

A memory system includes: a memory device storing data in a location determined by a physical address corresponding to a logical address; and a controller updating the physical address corresponding to the logical address for moving the data associated with the logical address to another location, storing the data including update history of the physical address corresponding to the logical address into the another location determined by the updated physical address, and tracking the data associated with the logical address based on the update history of the physical address when the data is not stored normally into the another location. The data processing system is capable of efficiently storing a plurality of data managed in a tree structure.

Claims (14)

1. A memory system comprising:

a memory device configured to store data in a location determined by a physical address corresponding to a logical address; and

a controller configured to update the physical address corresponding to the logical address for moving the data associated with the logical address to another location, store the data including update history of the physical address corresponding to the logical address into the another location determined by the updated physical address, and track the data associated with the logical address based on the update history of the physical address.

2. The memory system of claim 1 , wherein the update history of the physical address corresponding to the logical address includes the updated physical address and previously updated physical addresses linked in updated order.

3. The memory system of claim 2 , wherein the data further includes at least one of read count information, debugging information and erase/write count information corresponding to the logical memory block address data.

4. The memory system of claim 3 , wherein the controller further checks the read count information, the debugging information and the erase/write count information in the history data.

5. An operating method of a memory system including a memory device storing data in a location determined by a physical address corresponding to a logical address, the method comprising:

updating the physical address corresponding to the logical address for moving the data associated with the logical address to another location;

storing the data including update history of the physical address corresponding to the logical address into the another location determined by the updated physical address; and

tracking the data associated with the logical address based on the update history of the physical address.

6. The method of claim 5 , wherein the update history of the physical address corresponding to the logical address includes the updated physical address and previously updated physical addresses linked in updated order.

7. The method of claim 6 , wherein the data further includes at least one of read count information, debugging information and erase/write count information.

8. The method of claim 7 , wherein the method further comprising:

checking the read count information, the debugging information and the erase/write count information in the data.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2018
From: PARK, JEEN
To: SK HYNIX INC.
Reel/Frame 046456/0513 →
Priority Claims (1)
KR 10-2018-0006841 · Jan 19, 2018 · national
Continuity (1)
Related Publication 20190227923A1 · Jul 25, 2019