High voltage solid-state transducers and solid-state transducer arrays having electrical cross-connections and associated systems and methods
View Patent ↗Solid-state transducer (“SST”) dies and SST arrays having electrical cross-connections are disclosed herein. An array of SST dies in accordance with a particular embodiment can include a first terminal, a second terminal and a plurality of SST dies coupled between the first and second terminals with at least a pair of the SST dies being coupled in parallel. The plurality of SST dies can individually include a plurality of junctions coupled in series with an interconnection between each individual junction. Additionally, the individual SST dies can have a cross-connection contact coupled to the interconnection. In one embodiment, the array can further include a cross-connection between the cross-connection contacts on the pair of the SST dies.
1. A method of forming a solid-state transducer (SST) die having a plurality of junctions coupled in series, the method comprising:
forming a light-emitting diode (LED) structure having a first semiconductor material at a first side, a second semiconductor material at a second side opposite the first side, and a light-emitting active region between the first semiconductor material and the second semiconductor material;
forming a first contact on a first junction, the first contact electrically coupled to the first semiconductor material;
forming a second contact on a second junction, the second contact electrically coupled to the second semiconductor material;
forming a trench between the first junction and the second junction;
forming an interconnect between the first junction and the second junction, the interconnect extending across the trench and electrically coupling the first semiconductor material and the second semiconductor material;
forming a conductive line electrically connected to the interconnect; and
forming a cross-connection contact electrically coupled to the conductive line and separated from at least one of the first and second semiconductor materials by an insulating material.
2. The method of claim 1 wherein the first, second and cross-connection contacts are accessible from the first side of the LED structure.
3. The method of claim 1 wherein forming the conductive line comprises forming the conductive line extending along the trench transversely with respect to the interconnect.
4. The method of claim 1 wherein forming the interconnect comprises forming the interconnect between the first contact and the second contact.
5. The method of claim 1 wherein the first contact is electrically isolated from the second semiconductor material and the second contact is electrically isolated from the first semiconductor material.
6. The method of claim 1 wherein the first semiconductor material comprises P-type GaN.
7. The method of claim 6 wherein the P-type GaN is doped with Mg.
8. The method of claim 1 wherein the second semiconductor material comprises N-type GaN.
9. The method of claim 8 wherein the N-type GaN is doped with Si.
10. The method of claim 1 wherein the first and second semiconductor materials individually include at least one of gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), gallium arsenide phosphide (GaAsP), gallium(III) phosphide (GaP), zinc selenide (ZnSe), boron nitride (BN), aluminum gallium nitride (AlGaN), or a combination thereof.
11. The method of claim 1 wherein the light-emitting active region comprises an InGaN single quantum well (“SQW”), GaN/InGaN multiple quantum wells (“MQWs”), and/or an InGaN bulk material.
12. The method of claim 1 , wherein the light-emitting active region comprises aluminum gallium indium phosphide (AlGaInP), aluminum gallium indium nitride (AlGaInN), or a combination thereof.
13. The method of claim 1 , further comprising coating the trench with the insulating material.
14. The method of claim 1 , wherein the cross-connection contact is not in direct electrical contact with either of the first and second semiconductor materials.