Physical page, logical page, and codeword correspondence
The present disclosure includes apparatuses and methods for physical page, logical page, and codeword correspondence. A number of methods include error coding a number of logical pages of data as a number of codewords and writing the number of codewords to a number of physical pages of memory. The number of logical pages of data can be different than the number of physical pages of memory.
1. An apparatus, comprising:
a number of memory devices; and
a controller coupled to the number of memory devices and configured to:
communicate with a host based on host logical page size; and
map a non-integer quantity of host logical pages of data to at least one corresponding physical page of memory.
2. The apparatus of claim 1 , wherein the controller is further configured to skip populate a particular host logical page with host data at least partially in response to a particular portion of the particular host logical page being mapped to a known bad physical page of memory.
3. The apparatus of claim 2 , wherein the controller is further configured to populate a second portion of the particular host logical page with error data, wherein the second portion of the particular host logical page is mapped to a known good physical page of memory.
4. The apparatus of claim 3 , wherein the controller is configured to map the non-integer quantity of host logical pages to the at least one corresponding physical page of memory in a redundant array of independent NAND (RAIN) stripe.
5. The apparatus of claim 4 , wherein the error data comprises data to maintain the RAIN stripe.
6. The apparatus of claim 5 , wherein the error data comprises random data.
7. The apparatus of claim 2 , wherein the controller is further configured to populate a different host logical page subsequent to the particular host logical page with host data.
8. The apparatus of claim 1 , wherein the controller is further configured to skip populate a particular host logical page with host data at least partially in response to a forced unit access (FUA) associated with a previous host logical page.
9. The apparatus of claim 8 , wherein the controller is further configured to populate a first portion of the particular host logical page with error data prior to writing data associated with the previous host logical page in a number of physical pages.
10. The apparatus of claim 8 , wherein the controller is further configured to populate a second portion of the particular host logical page with error data after the FUA.
11. The apparatus of claim 1 , wherein the controller is further configured to skip populate a particular host logical page with host data at least partially in response to no additional host data being presently available for writing.
12. A method, comprising:
communicating, by a controller, with a host based on host logical page size;
mapping, by the controller coupled to a number of memory devices, a non-integer quantity of host logical pages of data to at least one corresponding physical page of memory.
13. The method of claim 12 , further comprising skip populating a particular one of the plurality host logical page with host data at least partially in response to a particular portion of the particular host logical page being mapped to a known bad physical page of memory.
14. The method of claim 13 , further comprising populating a second portion of the particular host logical page with error data, wherein the second portion of the particular host logical page is mapped to a known good physical page of memory.
15. The method of claim 14 , further comprising mapping the non-integer quantity of host logical pages to the at least one corresponding physical page of memory in a redundant array of independent NAND (RAIN) stripe.
16. The method of claim 15 , wherein the error data comprises data to maintain the RAIN stripe.
17. The method of claim 16 , wherein the error data comprises random data.
18. The method of claim 13 , further comprising populating a different host logical page subsequent to the particular host logical page with host data.
19. The method of claim 12 , further comprising skip populating a particular host logical page with host data at least partially in response to a forced unit access (FUA) associated with a previous host logical page.
20. The method of claim 19 , further comprising populating a first portion of the particular host logical page with error data prior to writing data associated with the previous host logical page in a number of physical pages.
21. The method of claim 19 , further comprising populating a second portion of the particular host logical page with error data after the FUA.
22. The method of claim 12 , further comprising skip populating a particular host logical page with host data at least partially in response to no additional host data being presently available for writing.