IP Library Granted Patent US 10,496,580
Granted Patent B1
US 10,496,580 · App. 16/053,156 · Granted Dec 3, 2019

System and method of configuring information handling systems

Inventors: Timothy M. Lambert (Austin, TX); Jordan H. Chin (Austin, TX); Jeffrey Leighton Kennedy (Austin, TX)
Assignee: Dell Products L.P.
G06F13/4018G06F13/4054H03M9/00G06F2213/0026
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,496,580
App. No.
16/053,156
Granted
Dec 3, 2019
Kind
B1
Abstract

In one or more embodiments, one or more systems, methods, and/or systems may provide an output signal via a first port of multiple ports; may determine that the output signal is detected via a second port of the multiple ports; if the first port and the second port are not capable of being coupled, may provide a notification that indicates that the first port and the second port are not capable of being coupled; and if the first port and the second port are capable of being coupled: may configure a Serializer/Deserializer (SerDes) associated with the first port to communicate with a SerDes associated with the second port; and may configure a first processor of multiple processors to communicate with a second processor of the multiple processors via the SerDes associated with the first port.

Claims (110)

1. An information handling system, comprising:

a plurality of processors processor, each of processor of the plurality of processors including a plurality of Serializer/Deserializers;

a plurality of ports coupled to the plurality of Serializer/Deserializers of each processor of the plurality of processors; and

a device coupled to the plurality of Serializer/Deserializers of each processor of the plurality of processors and to the plurality of ports;

wherein the device is configured to:

provide an output signal via a first port of the plurality of ports;

determine that the output signal is detected via a second port of the plurality of ports;

determine if the first port and the second port are capable of being coupled;

if the first port and the second port are not capable of being coupled:

disengage at least one of a Serializer/Deserializer (SerDes) associated with the first port and a SerDes associated with the second port; and

provide a notification that indicates that the first port and the second port are not capable of being coupled;

if the first port and the second port are capable of being coupled:

determine if a type of a coupling coupled to the first port and the second port is applicable;

if the type of the coupling coupled to the first port and the second port is applicable:

configure the SerDes associated with the first port to communicate with the SerDes associated with the second port; and

configure a first processor of the plurality of processors to communicate with a second processor of the plurality of processors via the SerDes associated with the first port;

if the type of the coupling coupled to the first port and the second port is not applicable, provide a notification that indicates that the type of the coupling coupled to the first port and the second port is not applicable;

determine that the output signal is not detected via the second port of the plurality of ports;

determine if the second port is coupled to a backplane;

if the second port is coupled to the backplane:

determine a type of a coupling to the backplane; and

configure the SerDes associated with the second port based at least on the type of the coupling to the backplane; and

if the second port is not coupled to the backplane, disengage the SerDes associated with the second port.

2. The information handling system of claim 1 , wherein the device is further configured to:

after determining the type of the coupling to the backplane, determine, based at least on the type of the coupling to the backplane, at least one of a reactive load and a resistive load to be introduced to a signal path coupled to the second port; and

introduce the at least one of the reactive load and the resistive load to the signal path.

3. The information handling system of claim 1 , wherein the device is further configured to:

if the type of the coupling coupled to the first port and the second port is not applicable:

disengage the SerDes associated with the first port; and

disengage the SerDes associated with the second port.

4. The information handling system of claim 1 , wherein the device is further configured to:

determine that the output signal is detected via a third port of the plurality of ports;

determine that a type of a coupling coupled to the first port and the third port is applicable;

determine that coupling the first port to another port of the plurality of ports will provide lower data communication latency; and

provide a notification that indicates that coupling the first port to the other port will provide lower data communication latency.

5. The information handling system of claim 2 ,

wherein the type of the coupling to the backplane includes a peripheral component interconnect express (PCIe); and

wherein the at least one of the reactive load and the resistive load includes a capacitor.

6. The information handling system of claim 4 , wherein the device is further configured to:

determine that the output signal is not detected via the second port of the plurality of ports;

wherein the other port is the second port.

7. The information handling system of claim 4 , wherein determining that coupling the first port to the other port will provide lower data communication latency is based at least on a distance between the first port and the third port and a distance between the first port and the other port.

8. A method, comprising:

providing an output signal via a first port of a plurality of ports of an information handling system;

determining that the output signal is detected via a second port of the plurality of ports;

determining if the first port and the second port are capable of being coupled;

if the first port and the second port are not capable of being coupled:

disengaging at least one of a Serializer/Deserializer (SerDes) associated with the first port and a SerDes associated with the second port; and

providing a notification that indicates that the first port and the second port are not capable of being coupled;

if the first port and the second port are capable of being coupled:

determining if a type of a coupling coupled to the first port and the second port is applicable;

if the type of the coupling coupled to the first port and the second port is applicable:

configuring the SerDes associated with the first port to communicate with the SerDes associated with the second port;

determining that the output signal is not detected via the second port of the plurality of ports;

determining if the second port is coupled to a backplane;

if the second port is coupled to the backplane:

determining a type of a coupling to the backplane; and

configuring the SerDes associated with the second port based at least on the type of the coupling to the backplane;

if the second port is not coupled to the backplane, disengaging the SerDes associated with the second port; and

if the output signal is detected via the second port:

determining if the first port and the second port are capable of being coupled;

if the first port and the second port are not capable of being coupled:

disengaging the SerDes associated with the second port;

disengaging a SerDes associated with the first port; and

providing a notification that indicates that the first port and the second port are not capable of being coupled; and

determining if a type of a coupling coupled to the first port and the second port is applicable.

9. The method of claim 8 , further comprising:

after the determining the type of the coupling to the backplane, determining, based at least on the type of the coupling to the backplane, at least one of a reactive load and a resistive load to be introduced to a signal path coupled to the second port; and

introducing the at least one of the reactive load and the resistive load to the signal path.

10. The method of claim 8 , further comprising:

if the type of the coupling coupled to the first port and the second port is not applicable:

disengaging the SerDes associated with the first port; and

disengaging the SerDes associated with the second port.

11. The method of claim 8 , further comprising:

determining that the output signal is detected via a third port of the plurality of ports;

determining that a type of a coupling coupled to the first port and the third port is applicable;

determining that coupling the first port to another port of the plurality of ports will provide lower data communication latency; and

providing a notification that indicates that coupling the first port to the other port will provide lower data communication latency.

12. The method of claim 11 ,

wherein the type of the coupling to the backplane includes a peripheral component interconnect express (PCIe); and

wherein the at least one of the reactive load and the resistive load includes a capacitor.

13. The method of claim 11 , further comprising:

determining that the output signal is not detected via the second port of the plurality of ports;

wherein the other port is the second port.

14. The method of claim 11 , wherein the determining that coupling the first port to the other port will provide lower data communication latency is based at least on a distance between the first port and the third port and a distance between the first port and the other port.

15. A programmable logic device, configured to:

provide an output signal via a first port of a plurality of ports of an information handling system;

determine that the output signal is detected via a second port of the plurality of ports;

determine if the first port and the second port are capable of being coupled;

if the first port and the second port are not capable of being coupled:

disengage at least one of a Serializer/Deserializer (SerDes) associated with the first port and a SerDes associated with the second port; and

provide a notification that indicates that the first port and the second port are not capable of being coupled;

if the first port and the second port are capable of being coupled:

determine if a type of a coupling coupled to the first port and the second port is applicable;

if the type of the coupling coupled to the first port and the second port is applicable:

configure the SerDes associated with the first port to communicate with the SerDes associated with the second port;

determine that the output signal is not detected via the second port of the plurality of ports;

determine if the second port is coupled to a backplane;

if the second port is coupled to the backplane:

determine a type of a coupling to the backplane; and

configure the SerDes associated with the second port based at least on the type of the coupling to the backplane; and

if the second port is not coupled to the backplane, disengage the SerDes associated with the second port.

16. The programmable logic device of claim 15 , wherein the programmable logic device is further configured to:

after determining the type of the coupling to the backplane, determine, based at least on the type of the coupling to the backplane, at least one of a reactive load and a resistive load to be introduced to a signal path coupled to the second port; and

introduce the at least one of the reactive load and the resistive load to the signal path.

17. The programmable logic device of claim 15 , wherein the programmable logic device is further configured to:

determine that the output signal is detected via a third port of the plurality of ports;

determine that a type of a coupling coupled to the first port and the third port is applicable;

determine that coupling the first port to another port of the plurality of ports will provide lower data communication latency; and

provide a notification that indicates that coupling the first port to the other port will provide lower data communication latency.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (047648/0422) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060160/0862 →
RELEASE OF SECURITY INTEREST AT REEL 047648 FRAME 0346 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0510 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Oct 12, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 047648/0346 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Oct 12, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 047648/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2018
From: LAMBERT, TIMOTHY M.; CHIN, JORDAN H.; KENNEDY, JEFFREY LEIGHTON
To: DELL PRODUCTS L.P.
Reel/Frame 046539/0225 →