IP Library Granted Patent US 10,495,813
Granted Patent B2
US 10,495,813 · App. 16/054,145 · Granted Dec 3, 2019

Echelle grating multiplexer or demultiplexer

Inventors: Daniel Mahgerefteh (Los Angeles, CA); Ying Luo (Sunnyvale, CA); Jin-Hyoung Lee (Sunnyvale, CA); Shiyun Lin (San Diego, CA)
Assignee: Finisar Corporation
G02B6/12007G02B6/12016G02B6/124G02B2006/12061G02B2006/12107G02B2006/12164
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Quick Facts
Patent No.
US 10,495,813
App. No.
16/054,145
Granted
Dec 3, 2019
Kind
B2
Abstract

In one example embodiment, an integrated silicon photonic wavelength division demultiplexer includes an input waveguide, an input port, a plurality of output waveguides, a plurality of output ports, a first auxiliary waveguide, and a plurality of auxiliary waveguides. The input waveguide may be formed in a first layer and having a first effective index n1. The input port may be optically coupled to the input waveguide. The output waveguides may be formed in the first layer and may have the first effective index n1. Each of the output ports may be optically coupled to a corresponding output waveguide. The first auxiliary waveguide may be formed in a second layer below the input waveguide in the first layer. The first auxiliary waveguide may have a second effective index n2 and may have two tapered ends, and n2 may be higher than n1.

Claims (49)

1. An integrated silicon photonic wavelength division demultiplexer comprising:

an input waveguide formed in a first layer and having a first effective index n1;

an input port, wherein the input port is optically coupled to the input waveguide;

a plurality of output waveguides formed in the first layer and having the first effective index n1;

a plurality of output ports, wherein each of the output ports is optically coupled to a corresponding output waveguide of the plurality of output waveguides;

a first auxiliary waveguide formed in a second layer positioned against and directly beneath the input waveguide in the first layer, the first auxiliary waveguide having a second effective index n2 and having two tapered ends; and

a plurality of auxiliary waveguides formed in the second layer below the plurality of output waveguides in the first layer, each of the plurality of auxiliary waveguides having the second effective index n2 and having a flat end and a tapered end;

wherein n2 is higher than n1.

2. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein n2 being higher than n1 increases confinement of the input and output waveguides.

3. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein n2 being higher than n1 reduces crosstalk between output channels of the plurality of output ports.

4. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein the first layer includes silicon nitride (SiN) and the second layer includes silicon (Si).

5. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein the first layer consists of silicon nitride (SiN) and the second layer consists of silicon (Si).

6. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein the first layer includes a dimension between 500 nanometers (nm) and 3000 nm.

7. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein the second layer includes a dimension between 150 nanometers (nm) and 200 nm.

8. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein the wavelength division multiplexer is an Echelle grating.

9. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein the wavelength division multiplexer is an Arrayed Waveguide Grating.

10. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein a diffraction angle of the input waveguide is between 15 and 40 degrees.

11. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein a diffraction angle of the output waveguides is between 15 and 40 degrees.

12. An integrated silicon photonic wavelength division demultiplexer comprising:

a first layer having a first effective index, n1, an input port, the input port optically coupled to an input waveguide;

a plurality of output ports, each of the output ports optically coupled to a corresponding output waveguide in the first layer and having the first effective index n1; and

a first pair of auxiliary waveguides formed in a second layer positioned against and directly beneath the input waveguide in the first layer, the pair of auxiliary waveguides having a second effective index n2 and having two tapered ends;

wherein n2 is higher than n1.

13. The integrated silicon photonic wavelength division demultiplexer of claim 12 , further comprising a plurality of pairs of auxiliary waveguides in the second layer, each of the pairs of auxiliary waveguides positioned below a corresponding output waveguide in the first layer, and each of the pairs of auxiliary waveguides having the second effective index n2, and having two tapered ends.

14. The integrated silicon photonic wavelength division demultiplexer of claim 12 , wherein n2 is higher than n1 such that confinement of the input and output waveguides is increased.

15. The integrated silicon photonic wavelength division demultiplexer of claim 12 , wherein n2 is higher than n1 such that crosstalk is reduced between output channels of the plurality of output ports.

16. The integrated silicon photonic wavelength division demultiplexer of claim 12 , wherein:

the wavelength division multiplexer is an Echelle grating;

the input port is located at an angular position on a Rowland circle;

the output ports are located at angular positions on the Rowland Circle; and

the angular position of the output ports is chosen to be between a lower bound and an upper bound value such that λ 0 −λ k >N×Δλ, for all higher order modes k.

17. The integrated silicon photonic wavelength division demultiplexer of claim 12 , wherein a diffraction angle of the input waveguide is between 15 and 40 degrees.

18. The integrated silicon photonic wavelength division demultiplexer of claim 12 , wherein a diffraction angle of the output waveguides is between 15 and 40 degrees.

19. An integrated silicon photonic wavelength division demultiplexer comprising:

a plurality of input waveguides formed in a first layer and having a first effective index n1;

a plurality of input ports, wherein each of the input ports is optically coupled to a corresponding input waveguide of the plurality of input waveguides;

an output waveguide formed in the first layer and having the first effective index n1;

an output port, wherein the output port is optically coupled to the output waveguide; and

a first auxiliary waveguide formed in a second layer positioned against and directly beneath the output waveguide in the first layer, the first auxiliary waveguide having a second effective index n2 and having two tapered ends;

wherein n2 is higher than n1.

20. The integrated silicon photonic wavelength division demultiplexer of claim 19 , further comprising a plurality of auxiliary waveguides formed in the second layer below the plurality of input waveguides in the first layer, each of the plurality of auxiliary waveguides having the second effective index n2 and having two tapered ends.

21. The integrated silicon photonic wavelength division demultiplexer of claim 1 , wherein the plurality of auxiliary waveguides are positioned against and directly beneath a corresponding one of the plurality of output waveguides.

22. An integrated silicon photonic wavelength division demultiplexer comprising:

an input waveguide formed in a first layer and having a first effective index n1;

an input port, wherein the input port is optically coupled to the input waveguide;

a plurality of output waveguides formed in the first layer and having the first effective index n1;

a plurality of output ports, wherein each of the output ports is optically coupled to a corresponding output waveguide of the plurality of output waveguides; and

a plurality of auxiliary waveguides formed in a second layer positioned against and directly beneath each of the plurality of output waveguides in the first layer, each of the plurality of auxiliary waveguides having a second effective index n2 and having a flat end and a tapered end;

wherein n2 is higher than n1.

Assignments (5)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2018
From: MAHGEREFTEH, DANIEL; LUO, YING; LEE, JIN-HYOUNG; LIN, SHIYUN
To: FINISAR CORPORATION
Reel/Frame 046549/0359 →