IP Library Granted Patent US 11,429,505
Granted Patent B2
US 11,429,505 · App. 16/054,489 · Granted Aug 30, 2022

System and method to provide optimal polling of devices for real time data

Inventors: Akkiah Choudary Maddukuri (Austin, TX); Arun Muthaiyan (Round Rock, TX); Komal Kumar Dhote (Bangalore, IN); Rama Rao Bisa (Bangalore, IN)
Assignee: DELL PRODUCTS L.P.
G06F11/3051G06F8/65G06F9/4411G06F11/0757G06F11/3027G06F11/3055G06F11/3072G06F8/654
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Quick Facts
Patent No.
US 11,429,505
App. No.
16/054,489
Granted
Aug 30, 2022
Kind
B2
Abstract

A system for polling components is disclosed that includes a plurality of processors and a control system configured to interface with each of the plurality of processors, and to 1) poll each of the plurality of processors using a first polling loop and 2) transfer one of the plurality of processors to a second polling loop if the one of the plurality of processors is non-responsive to the poll.

Claims (29)

1. A system for polling components, comprising:

a plurality of processors; and

a control system configured to interface with each of the plurality of processors, and to 1) poll each of the plurality of processors using a first polling loop and 2) transfer one of the plurality of processors to a second polling loop if the one of the plurality of processors is non-responsive to the poll and initiate bus recovery, wherein the control system is further

configured to determine whether one of the plurality of processors requires a firmware update using inter-integrated circuit communications and to suspend polling of the other processors until the firmware update is completed.

2. The system of claim 1 wherein the control system is further configured to poll the one of the plurality of processors that is responsive to the poll at a lower polling rate in a second state that is distinct from a first state associated with the poll.

3. The system of claim 1 wherein the control system is further configured to poll the one of the plurality of processors that is responsive to the poll at a lower polling rate, and to transfer the one of the plurality of processors that is responsive to the poll back to the first polling loop when it becomes non-responsive to the poll.

4. The system of claim 1 wherein the control system is further configured to adjust a device priority as a function of the device non-response to a poll.

5. The system of claim 1 wherein the control system is further configured to determine an average polling rate of the plurality of processors and to adjust a device polling rate for one of the plurality of processors as a function of a change in the average polling rate.

6. A method for polling components, comprising:

interfacing with each of a plurality of processors from a control system, wherein each processor is configured to always respond to a poll with data if the processor has not failed;

polling each of the plurality of processors with the control system using a first polling loop;

delaying a polling period for one of the plurality of processors if it responds to the poll and transferring the one of the plurality of processors to a second polling loop with the control system if the one of the plurality of processors is non-responsive to the poll and has previously responded to at least one poll as operative;

determining whether one of the plurality of processors requires a firmware update; and

suspending polling of the other processors by the control system until the firmware update is completed.

7. The method of claim 6 further comprising polling the one of the plurality of processors that is non-responsive to the poll at a lower polling rate with the control system.

8. The method of claim 6 further comprising:

polling the one of the plurality of processors that is non-responsive to the poll at a lower polling rate; and

transferring the one of the plurality of processors that is non-responsive to the poll back to the first polling loop when it becomes responsive to the poll.

9. The method of claim 6 further comprising adjusting a device priority as a function of the device response to a poll.

10. The method of claim 6 further comprising adjusting a device polling rate as a function of an average polling rate change.

11. A system for polling components, comprising:

a plurality of processors, each configured to transmit data in response to a poll; and

a monitoring module operating on a processor and configured to interface with each of the plurality of processors, and to 1) poll each of the plurality of processors at a maximum polling rate using a first polling loop and 2) transfer the plurality of processors to a second polling loop at a minimum polling rate if delay is detected, wherein the minimum polling rate is then increased towards the maximum polling rate and the monitoring module is further configured to determine whether one of the plurality of processors requires a firmware update and to transfer polling of the other processors to the second polling loop until the firmware update is completed.

12. The system of claim 11 wherein the monitoring module is further configured to poll the one of the plurality of processors that is non-responsive to the poll at a lower polling rate until the error condition is resolved.

13. The system of claim 11 further comprising means for polling the one of the plurality of processors that is non-responsive to the poll at a lower polling rate, and to transfer the one of the plurality of processors that is non-responsive to the poll back to the first polling loop when it becomes responsive to the poll.

14. The system of claim 11 wherein the monitoring module is further configured to adjust a device priority as a function of the device response to the poll or the device non-response to the poll due to the error condition.

15. The system of claim 11 wherein the monitoring module is further configured to adjust a device polling rate as a function of an average polling rate change.

16. The system of claim 1 wherein the first polling loop comprises a plurality of normal priority threaded polling processes and the second polling loop comprises a plurality of lower priority threaded polling processes for failed devices.

17. The system of claim 1 wherein the first polling loop comprises a plurality of normal priority threaded polling processes, the second polling loop comprises a plurality of lower priority threaded polling processes, and a thread of the first polling loop is terminated for one of the plurality of processors when it is determined that the one of the plurality of processors has failed due to non-response and a thread of the second polling loop is instantiated for the one of the plurality of processors.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (047648/0422) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060160/0862 →
RELEASE OF SECURITY INTEREST AT REEL 047648 FRAME 0346 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0510 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Oct 12, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 047648/0346 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Oct 12, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 047648/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2018
From: MADDUKURI, AKKIAH CHOUDARY; MUTHAIYAN, ARUN; DHOTE, KOMAL KUMAR; BISA, RAMA RAO
To: DELL PRODUCTS L.P.
Reel/Frame 046562/0430 →