IP Library Granted Patent US 10,727,167
Granted Patent B2
US 10,727,167 · App. 16/069,192 · Granted Jul 28, 2020

Power semiconductor device and method for manufacturing power semiconductor device

Inventors: Takayuki Yamada (Tokyo, JP); Noriyuki Besshi (Tokyo, JP); Yuya Muramatsu (Tokyo, JP); Masaru Fuku (Tokyo, JP); Dai Nakajima (Tokyo, JP)
Assignee: MITSUBISHI ELECTRIC CORPORATION
H01L23/4924H01L21/4875H01L21/52H01L24/06H01L24/83H01L29/12H01L29/417H01L29/66333H01L29/7393H01L24/05H01L24/29H01L24/32H01L2224/04026H01L2224/05023H01L2224/05124H01L2224/05155H01L2224/05166H01L2224/05568H01L2224/05583H01L2224/05624H01L2224/05644H01L2224/06181H01L2224/293H01L2224/2929H01L2224/29339H01L2224/29344H01L2224/29347H01L2224/29355H01L2224/29364H01L2224/29369H01L2224/32225H01L2224/32245H01L2224/33181H01L2224/73263H01L2224/83048H01L2224/8384H01L2224/83097H01L2224/83192H01L2224/83201H01L2924/3511
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Quick Facts
Patent No.
US 10,727,167
App. No.
16/069,192
Granted
Jul 28, 2020
Kind
B2
Abstract

This power semiconductor device is provided with: a substrate; and a semiconductor element which is bonded onto the substrate using a sinterable metal bonding material. The semiconductor element comprises: a base; a first conductive layer that is provided on a first surface of the base, said first surface being on the substrate side; and a second conductive layer that is provided on a second surface of the base, said second surface being on the reverse side of the first surface. The thickness of the first conductive layer is from 0.5 times to 2.0 times (inclusive) the thickness of the second conductive layer.

Claims (24)

1. A power semiconductor device comprising:

a substrate; and

a semiconductor element bonded on the substrate by using a sinterable metal bonding material,

wherein the semiconductor element has a base, a first conductive layer disposed on a first surface on a substrate side of the base, and a second conductive layer disposed on a second surface opposite to the first surface of the base, the first conductive layer including an AlSi layer and a Ni layer, the AlSi layer and the Ni layer directly contacting one another, and

wherein the thickness of the first conductive layer is from 0.5 times to 2.0 times (inclusive) the thickness of the second conductive layer.

2. The power semiconductor device according to claim 1 , wherein the thickness of the first conductive layer is from 0.55 times to 1.8 times (inclusive) the thickness of the second conductive layer.

3. The power semiconductor device according to claim 1 , wherein

the second conductive layer has a multilayer structure.

4. The power semiconductor device according to claim 1 , wherein

the base of the semiconductor element has a thickness of 150 μm or less.

5. The power semiconductor device according to claim 1 , wherein

the metal of the sinterable metal bonding material is selected from the group consisting of Ag, Cu, and Ni.

6. The power semiconductor device according to claim 1 , wherein

the Ni layer has a thickness of 1.5 μm or more.

7. The power semiconductor device according to claim 1 , wherein

the thickness of the Ni layer is 1.15 times or more than the thickness of the AlSi layer.

8. The power semiconductor device according to claim 1 ,

wherein the base of the semiconductor element is a silicon-based material,

wherein the second conductive layer is connected to a wiring member by using a solder material containing Sn,

wherein the first conductive layer has the AlSi layer disposed on a base side of the first conductive layer, an Au layer disposed on a side opposite to the base side of the first conductive layer, and the Ni layer disposed between the AlSi layer and the Au layer, and

wherein the second conductive layer has a second AlSi layer disposed on a base side of the second conductive layer, a second Au layer disposed on a side opposite to the base side of the second conductive layer, and a second Ni layer disposed between the AlSi layer and the Au layer.

9. The power semiconductor device according to claim 1 , wherein

if the linear expansion coefficient of the substrate is equal to or greater than the linear expansion coefficient of the semiconductor element, the thickness of the first conductive layer is from 1.0 times to 1.8 times (inclusive) the thickness of the second conductive layer, and wherein

if the linear expansion coefficient of the substrate is smaller than the linear expansion coefficient of the semiconductor element, the thickness of the first conductive layer is from 0.55 times (inclusive) to 1.0 times (exclusive) the thickness of the second conductive layer.

Assignments (2)
COMPANY SPLIT Recorded Sep 4, 2024
From: MITSUBISHI ELECTRIC CORPORATION
To: MITSUBISHI ELECTRIC MOBILITY CORPORATION
Reel/Frame 068834/0585 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2018
From: YAMADA, TAKAYUKI; BESSHI, NORIYUKI; MURAMATSU, YUYA; FUKU, MASARU; NAKAJIMA, DAI
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 046314/0437 →