NAND logical-to-physical table region tracking
Devices and techniques for NAND logical-to-physical table region tracking are described herein. A write request, including a logical page and data to be written at the logical page, is received at a controller of a NAND device. The NAND controller may then establish an entry in a logical-to-physical (L2P) mapping table between the logical page and a physical page of a physical block of the NAND device to which the data is written. Here, the entry may be in a region of the L2P mapping table that is one of multiple regions. An indication of the region may be written in a data structure corresponding to the physical block.
1. A NAND device for NAND logical-to-physical table region tracking, the NAND device comprising:
a NAND array; and
a controller configured to:
erase a physical block of the NAND array;
initialize a data structure corresponding to the physical block in response to erasing the physical block, the data structure being initialized in the NAND array in the physical block or in a maintenance area of the NAND array that is separate from the physical block;
receive a write request that includes a logical page and data to be written at the logical page;
establish an entry in a logical-to-physical mapping table between the logical page and a physical page of the physical block of the NAND array to which the data is written, the entry being in a region of the logical-to-physical mapping table, the region being one of multiple regions of the logical-to-physical mapping table; and
write, in the NAND array, an indication of the region in the data structure as part of performing the write request to write the data to the physical block, wherein the indication is unset only when the data structure is initialized.
2. The NAND device of claim 1 , wherein the data structure is a bit map.
3. The NAND device of claim 2 , wherein the bit map includes a bit for each region of the multiple regions.
4. The NAND device of claim 3 , wherein, to write the indication of the region, the controller is further configured to write a logical one in the bit corresponding to the region in the bit map.
5. The NAND device of claim 3 , wherein the regions of the multiple regions are ordered, and wherein an index the bit for each region corresponds to an order of a respective region.
6. The NAND device of claim 1 , wherein the data structure is written in the physical block.
7. The NAND device of claim 1 , further comprising a working memory, wherein the logical-to-physical mapping table is larger than the working memory, and wherein each region of the multiple regions is not larger than the working memory.
8. The NAND device of claim 1 , further comprising a working memory, wherein the controller is to:
read the data structure during a garbage collection operation of the physical block;
load a limited set of regions of the logical-to-physical mapping table into the working memory, the limited set of regions identified as only those regions in the multiple regions that have a respective indication in the data structure; and
retrieve entries from the limited set of regions to perform the garbage collection operation.
9. The NAND device of claim 8 , wherein no regions of the multiple regions that are not in the limited set of regions are used in the garbage collection operation.
10. A method for NAND logical-to-physical table region tracking, the method comprising:
erasing a physical block of a NAND array of a NAND device;
initializing a data structure corresponding to the physical block in response to erasing the physical block, the data structure being initialized in the NAND array in the physical block or in a maintenance area of the NAND array that is separate from the physical block:
receiving a write request at a controller of the NAND device, the write request including a logical page and data to be written at the logical page;
establishing, by the controller, an entry in a logical-to-physical mapping table between the logical page and a physical page of the physical block of the NAND device to which the data is written, the entry being in a region of the logical-to-physical mapping table, the region being one of multiple regions of the logical-to-physical mapping table; and
writing, in the NAND array by the NAND controller, an indication of the region in the data structure as part of performing the write request to write the data to the physical block, wherein the indication is unset only when the data structure is initialized.
11. The method of claim 10 , wherein the data structure is a bit map.
12. The method of claim 11 , wherein the bit map includes a bit for each region of the multiple regions.
13. The method of claim 12 , wherein writing the indication of the region includes writing a logical one in the bit corresponding to the region in the bit map.
14. The method of claim 12 , wherein the regions of the multiple regions are ordered, and wherein an index of the bit for each region corresponds to an order of a respective region.
15. The method of claim 10 . wherein the data structure is written in the physical block.
16. The method of claim 10 , wherein the NAND device includes a working memory, wherein the logical-to-physical mapping table is larger than the working memory, and wherein a region of the multiple regions is not larger than the working memory.
17. The method of claim 10 , comprising:
reading the data structure during a garbage collection operation of the physical block;
loading a limited set of regions of the logical-to-physical mapping table into a working memory of the NAND device, the limited set of regions identified as only those regions in the multiple regions that have a respective indication in the data structure; and
retrieving entries from the limited set of regions to perform the garbage collection operation.
18. The method of claim 17 , wherein no regions of the multiple regions that are not in the limited set of regions are used in the garbage collection operation.
19. A non-transitory machine readable medium including instructions for NAND logical-to-physical table region tracking, the instructions, when executed by a machine, cause the machine to perform operations comprising:
erasing a physical block of a NAND array of a NAND device:
initializing a data structure corresponding to the physical block in response to erasing the physical block, the data structure being initialized in the ND array in the physical block or in a maintenance area of the NAND array that is separate from the physical block;
receiving a write request at a controller of the NAND device, the write request including a logical page and data to be written at the logical page;
establishing, by the controller, an entry in a logical-to-physical mapping table between the logical page and a physical page of the physical block of the NAND device to which the data is written, the entry being in a region of the logical-to-physical mapping table, the region being one of multiple regions of the logical-to-physical mapping table; and
writing, in the NAND array by the controller, an indication of the region in the data structure as part of performing the write request to write the data to the physical block, wherein the indication is unset only when the data structure is initialized.
20. The non-transitory machine readable medium of claim 19 , wherein the data structure is a bit map.
21. The non-transitory machine readable medium of claim 20 , wherein the bit map includes a bit for each region of the multiple regions.
22. The non--transitory machine readable medium of claim 21 , wherein writing the indication of the region includes writing a logical one in the bit corresponding to the region in the bit map.
23. The non-transitory machine readable medium of claim 21 , wherein the regions of the multiple regions are ordered, and wherein an index of the bit for each region corresponds to an order of a respective region.
24. The non-transitory machine readable medium of claim 19 , wherein the data structure is written in the physical block.
25. The non-transitory machine readable medium of claim 19 , wherein the NAND device includes a working memory, wherein the logical-to-physical mapping table is larger than the working memory, and wherein each region of the multiple regions is not larger than the working memory.
26. The non-transitory machine readable medium of claim 19 , wherein the operations comprise:
reading the data structure during a garbage collection operation of the physical block;
loading a limited set of regions of the logical-to-physical mapping table into a working memory of the NAND device, the limited set of regions identified as only those regions in the multiple regions that have a respective indication in the data structure; and
retrieving entries from the limited set, of regions to perform the garbage collection operation.
27. The non-transitory machine readable medium of claim 26 , wherein no regions of the multiple regions that are not in the limited set of regions are used in the garbage collection operation.