IP Library Granted Patent US 10,790,568
Granted Patent B2
US 10,790,568 · App. 16/085,533 · Granted Sep 29, 2020

Carrier layout for an electro-optical module, an electro optical module using the same, and interconnect structure for coupling an electronic unit to an optical device

Inventors: Andrei Kaikkonen (Jaerfaella, SE); Robert Monroe Smith (Phoenix, AZ); Lennart Per Olof Lundqvist (Jaerfaella, SE); Lars-Goete Svenson (Sollentuna, SE); Marek Grzegorz Chacinski (Farsta, SE)
Assignee: II-VI Delaware Inc.
H01P3/081H01P3/006H01P3/026H05K1/0243H05K1/115H05K1/181H01L31/105H01P7/08H05K1/0225H05K2201/09063H05K2201/10121H05K2201/10151H05K2201/10174
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,790,568
App. No.
16/085,533
Granted
Sep 29, 2020
Kind
B2
Abstract

A carrier layout comprising a substrate comprising a ground plane layer and a coplanar waveguide interconnect disposed onto the substrate. The coplanar waveguide interconnect comprises a pair of coplanar conductors and a central conductor disposed between the pair of coplanar conductors. The coplanar conductors of the pair are electrically connected to each other by at least one conducting island that is isolated from the ground plane layer. The present invention also provides an interconnect structure for coupling an electronic unit to an optical device disposed on a substrate having a ground plane layer, the interconnect structure comprising a pair of coplanar conductors and a central conductor disposed between the pair of coplanar conductors. The conductors of the pair are electrically connected by at least one conducting island that is isolated from the ground plane layer.

Claims (35)

1. A carrier layout for an electro-optical module, the carrier layout comprising:

a substrate comprising a ground plane layer; and

a coplanar waveguide interconnect disposed onto the substrate, the coplanar waveguide interconnect comprising:

a pair of coplanar conductors; and

a central conductor disposed between the pair of coplanar conductors;

wherein the coplanar conductors of the pair are electrically connected to each other by at least one conducting island that is isolated from the ground plane layer.

2. A carrier layout according to claim 1 , wherein

the central conductor is adapted to provide a transmission path for transmitting an electric signal from an optical device to an electronic unit arranged on the substrate and/or vice-versa, and

the pair of coplanar conductors is adapted to provide a current return path between the optical device and the electronic unit.

3. A carrier layout according to claim 1 , wherein

the at least one conducting island is disposed in a respective cavity of the ground plane layer.

4. A carrier layout according to claim 3 , wherein

the cavity has an overture dimensioned so that the self-resonance frequency of the cavity is above a threshold frequency that is related to a fundamental frequency of a signal transmitted by the coplanar waveguide interconnect.

5. A carrier layout according to claim 4 , wherein said threshold frequency is 40 GHz.

6. A carrier layout according to claim 1 , wherein

the substrate includes a plurality of cavities along a linear direction of the coplanar waveguide interconnect for arranging a plurality of conducting islands,

the plurality of cavities being separated by ground bridges.

7. A carrier layout according to claim 1 any one of the preceding claims, wherein

the at least one conducting island is formed from the ground plane layer by defining a slot in the ground plane layer along the perimeter of the respective conducting island.

8. A carrier layout according to claim 1 , wherein

the coplanar waveguide interconnect further comprises a dielectric layer onto which the central conductor and the pair of coplanar conductors are arranged, and

the dielectric layer includes a plurality of vias for electrically coupling the coplanar conductors to the at least one conducting island.

9. A carrier layout according to claim 1 , wherein the central conductor and the pair of coplanar conductors are provided as conducting strips separated by a constant gap.

10. A carrier layout according to claim 1 , wherein the width of the central conductor and the distance between the central conductor and the ground plane layer is selected such as to obtain an impedance that substantially matches an impedance of the electronic unit to be coupled to the coplanar waveguide interconnect.

11. A carrier layout according to claim 1 , further comprising a optical device and an electronic unit arranged onto the substrate; wherein the coplanar waveguide interconnect is adapted to couple the optical device to the electronic unit.

12. A carrier layout according to claim 11 , wherein

the optical device is a PIN diode, and

the central conductor and one of the pair of coplanar conductors

are coupled to respective terminals of the PIN diode for biasing the PIN diode, wherein the pair of coplanar conductors are not connected to a ground potential.

13. A carrier layout according to claim 11 , wherein the electronic unit is a trans-impedance amplifier.

14. An electro-optical module comprising the carrier layout according to claim 1 .

15. An interconnect structure for coupling an electronic unit to an optical device disposed on a substrate having a ground plane layer, the interconnect structure comprising:

a pair of coplanar conductors; and

a central conductor disposed between the pair of coplanar conductors;

wherein the conductors in the pair of coplanar conductors are electrically connected to each other by at least one conducting island that is isolated from the ground plane layer.

Assignments (5)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2020
From: KAIKKONEN, ANDREI; SMITH, ROBERT MONROE; LUNDQVIST, LENNART PER OLOF; SVENSON, LARS-GOETE; CHACINSKI, MAREK GRZEGORZ
To: FINISAR CORPORATION
Reel/Frame 053204/0154 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →