IP Library Granted Patent US 10,762,021
Granted Patent B2
US 10,762,021 · App. 16/086,297 · Granted Sep 1, 2020

Information processing system, and control method of information processing system

Inventors: Hirotaka Nakagawa (Tokyo, JP); Akira Deguchi (Tokyo, JP); Hiroshi Nasu (Tokyo, JP); Tomohiro Kawaguchi (Tokyo, JP)
Assignee: Hitachi, Ltd.
G06F13/4031G06F3/067G06F3/0611G06F3/0635G06F3/0653G06F3/0665G06F11/3027G06F11/3055G06F13/10G06F13/14
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Quick Facts
Patent No.
US 10,762,021
App. No.
16/086,297
Granted
Sep 1, 2020
Kind
B2
Abstract

An information system connected to hosts and an information processing system manages a second ALU connected to the hosts via a second logical path, and second SLUs for receiving I/O requests from the hosts via the second logical path. A processor manages a first ALU connected to the hosts via a first logical path and first SLUs that receive I/O requests from the hosts via the first logical path, and builds up a first group including the first SLUs. A first SLU and a second SLU compose an HA pair, and the HA pair is provided to the hosts as one volume. The processor evaluates the state of the first logical path based on the pair state of the first SLU that composes the HA pair included in the first group so priorities with which the hosts issue I/Os to the first logical path can be determined.

Claims (53)

1. An information processing system that is connected to one or a plurality of hosts and a second information processing system, which manages a second ALU (Administrative Logical Unit) connected to the one or plurality of hosts via a second logical path, and a plurality of second SLUs (Subsidiary Logical Units) for receiving I/O (Input/Output) requests from the one or plurality of hosts via the second logical path, and that includes a processor, wherein

the processor manages a first ALU connected to the one or plurality of hosts via a first logical path and a plurality of first SLUs that receive I/O requests from the one or plurality of hosts via the first logical path and a third SLU, and builds up a first group including the plurality of first SLUs,

at least one first SLU of the plurality of first SLUs and at least one second SLU of the plurality of second SLUs compose an HA (High Availability) pair, and the HA pair is provided to the one or plurality of hosts as one volume,

the processor builds up a second group including the plurality of third SLUs,

at least one third SLU of the plurality of third SLUs and at least one second SLU of the plurality of second SLUs compose an HA pair, and the HA pair is provided to the one or plurality of hosts as one volume, and

the processor

evaluates the state of the first logical path on the basis of the pair state of the plurality of first SLUs that compose the HA pair included in the first group so that priorities with which the one or plurality of hosts issue I/Os to the first logical path can be determined, and

determines first priority that the one or plurality of hosts issue I/O to the first SLU via the first logical path, evaluates the state of the first logical path based on the pair state of the plurality of third SLUs that compose the HA pair included in the second group, and determines second priority that the one or plurality of hosts issue I/O to the third SLU via the first logical path.

2. The information processing system according to claim 1 , wherein,

if the pair state of the first SLU that composes the HA pair included in the first group does not include “BLOCK”, the processor evaluates the state of the first logical path as “ACTIVE/OPTIMIZED”;

if the pair state of the first SLU that composes the HA pair included in the first group includes “BLOCK”, and an I/O transfer between the information processing system and the second information processing system is utilizable, the processor evaluates the state of the first logical path as “ACTIVE/NON-OPTIMIZED”;

if the pair state of the first SLU that composes the HA pair included in the first group includes “BLOCK”, and an I/O transfer between the information processing system and the second information processing system is not utilizable, the processor evaluates the state of the first logical path as “STANDBY”;

if the pair state of the logical volume includes “BLOCK”, I/O is impossible for the logical volume;

if in the state of “ACTIVE/OPTIMIZED”, I/O is issued preferentially to the logical path; and

if I/O processing is possible but there was a probability of try request, “ACTIVE/OPTIMIZED” is defined.

3. The information processing system according to claim 1 , wherein the processor evaluates the state of the first logical path when any of the plurality of first SLUs is bound to the first ALU or when any of the plurality of first SLUs is unbound from the first ALU.

4. The information processing system according to claim 1 , the information processing system further comprising the one or plurality of hosts, wherein the one or plurality of hosts issue I/Os to the one volume via the first logical path or the second logical path on the basis of the evaluation of the state of the first logical path.

5. The information processing system according to claim 1 , wherein

the one or plurality of hosts manage as a first AG (Availability Group) including a plurality of first virtual computers, and manage as a second AG including a plurality of second virtual computers,

the first group further includes the first ALU, and

the first AG is associated with the first group, and one or a plurality of SLUs out of the plurality of first SLUs are assigned to the plurality of first virtual computers.

6. The information processing system according to claim 1 , wherein

the one or plurality of hosts manage as a first AG (Availability Group) including a plurality of first virtual computers,

the processor manages the identifier of a virtual port assigned to the first AG, which the host has, as a first HG (Host Group),

associates the first group with the first AG, and

evaluates the state of the first HG pair on the basis of the pair state of the first SLU that composes the HA pair included in the first group so that priorities with which the plurality of first virtual computers issue I/Os to the first logical path can be determined.

7. An information processing system that is connected to one or a plurality of hosts and a second information processing system, which manages a second ALU (Administrative Logical Unit) connected to the one or plurality of hosts via a second logical path, and a plurality of second SLUs (Subsidiary Logical Units) for receiving I/O (Input/Output) requests from the one or plurality of hosts via the second logical path, and that includes a processor, wherein,

the processor manages a first ALU connected to the one or plurality of hosts via a first logical path and a plurality of first SLUs that receive I/O requests from the one or plurality of hosts via the first logical path, and builds up a first group including the plurality of first SLUs,

at least one first SLU of the plurality of first SLUs and at least one second SLU of the plurality of second SLUs compose an HA (High Availability) pair, and the HA pair is provided to the one or plurality of hosts as one volume, and

the processor evaluates the state of the first logical path on the basis of the pair state of the first SLU that composes the HA pair included in the first group so that priorities with which the one or plurality of hosts issue I/Os to the first logical path can be determined,

when the number of retries of I/O issuance to the first logical path exceeds a threshold, the processor issues a test I/O to the plurality of first SLUs, and

when

the processor receives at least one normal response from one or more first SLUs of the plurality of first SLUs, the processor evaluates the state of the first logical path as “ACTIVE/NON-OPTRIMIZED”, and

the processor does not receive a normal response from any first SLU of the plurality of first SLUs, the processor evaluates the state of the first logical path as “BLOCK”.

8. A control method of an information processing system that is connected to one or a plurality of hosts and a second information processing system, which manages a second ALU (Administrative Logical Unit) connected to the one or plurality of hosts via a second logical path, and a plurality of second SLUs (Subsidiary Logical Units) for receiving I/O (Input/Output) requests from the one or plurality of hosts via the second logical path, and that includes a processor, wherein

the processor manages a first ALU connected to the one or plurality of hosts via a first logical path and a plurality of first SLUs that receive I/O requests from the one or plurality of hosts via the first logical path and a third SLU, and

builds up a first group including the plurality of first SLUs,

an HA (High Availability) pair is composed of at least one first SLU of the plurality of first SLUs and at least one second SLU of the plurality of second SLUs, and the HA pair is provided to the one or plurality of hosts as one volume, and

the processor builds up a second group including the plurality of third SLUs,

at least one third SLU of the plurality of third SLUs and at least one second SLU of the plurality of second SLUs compose an HA pair, and the HA pair is provided to the one or plurality of hosts as one volume, and

the processor

evaluates the state of the first logical path on the basis of the pair state of the first SLU that composes the HA pair included in the first group so that priorities with which the one or plurality of hosts issue I/Os to the first logical path can be determined, and

determines first priority that the one or plurality of hosts issue I/O to the first SLU via the first logical path, evaluates the state of the first logical path based on the pair state of the plurality of third SLUs that compose the HA pair included in the second group, and determines second priority that the one or plurality of hosts issue I/O to the third SLU via the first logical path.

9. The control method of the information processing system according to claim 8 , wherein,

if the pair state of the first SLU that composes the HA pair included in the first group does not include “BLOCK”, the state of the first logical path is evaluated as “ACTIVE/OPTIMIZED”;

if the pair state of the first SLU that composes the HA pair included in the first group includes “BLOCK”, and an I/O transfer between the information processing system and the second information processing device system is utilizable, the state of the first logical path is evaluated as “ACTIVE/NON-OPTIMIZED”;

if the pair state of the first SLU that composes the HA pair included in the first group includes “BLOCK”, and an I/O transfer between the information processing system and the second information processing system is not utilizable, the state of the first logical path is evaluated as “STANDBY”;

if the pair state of the logical volume includes “BLOCK”, I/O is impossible for the logical volume;

if in the state of “ACTIVE/OPTIMIZED”, I/O is issued preferentially to the logical path; and

if I/O processing is possible but there was a probability of try request, “ACTIVE/OPTIMIZED” is defined.

10. The control method of the information processing system according to claim 8 , wherein

the information processing system further includes the one or plurality of hosts; and

the one or plurality of hosts issues I/Os to the one volume via the first logical path or the second logical path on the basis of the evaluation of the state of the first logical path.

Assignments (2)
COMPANY SPLIT Recorded Aug 20, 2024
From: HITACHI, LTD.
To: HITACHI VANTARA, LTD.
Reel/Frame 069518/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2018
From: NAKAGAWA, HIROTAKA; DEGUCHI, AKIRA; NASU, HIROSHI; KAWAGUCHI, TOMOHIRO
To: HITACHI, LTD.
Reel/Frame 046904/0837 →
Continuity (1)
Related Publication 20190108157A1 · Apr 11, 2019