IP Library Granted Patent US 11,051,306
Granted Patent B2
US 11,051,306 · App. 16/095,667 · Granted Jun 29, 2021

Scrambling for control messages

Inventor: Debdeep Chatterjee (San Jose, CA)
Assignee: Intel IP Corporation
H04W72/0466H04L1/004H04L5/0053H04W72/042H04W88/02
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Quick Facts
Patent No.
US 11,051,306
App. No.
16/095,667
Granted
Jun 29, 2021
Kind
B2
Abstract

Technology for an eNodeB operable to apply scrambling to coded bits transported via a physical downlink shared channel (PDSCH) to a user equipment (UE) is disclosed. The eNodeB can generate a code word that comprises coded bits for transmission to the UE. The UE can be a bandwidth-reduced low complexity (BL) UE or a coverage enhancement (CE) UE. The eNodeB can identify, for the BL UE or the CE UE, a scrambling sequence to be applied to the coded bits. The scrambling sequence can be initialized using a defined initialization value (c init ). The eNodeB can apply the scrambling sequence with the defined initialization value to the coded bits to obtain scrambled coded bits. The eNodeB can encode the scrambled coded bits for transmission to the UE via the PDSCH.

Claims (193)

1. An apparatus of an eNodeB operable to apply scrambling to coded bits transported via a physical downlink shared channel (PDSCH) to a user equipment (UE), the eNodeB comprising one or more processors configured to:

generate, at the eNodeB, a code word that comprises coded bits for transmission to the UE, wherein the UE is a bandwidth-reduced low complexity (BL) UE or a coverage enhancement (CE) UE;

identify, at the eNodeB for the BL UE or the CE UE, a scrambling sequence to be applied to the coded bits, wherein the scrambling sequence is initialized using a defined initialization value (c init );

apply, at the eNodeB, the scrambling sequence with the defined initialization value to the coded bits to obtain scrambled coded bits, wherein the scrambling sequence is applied per subframe to the PDSCH for a given block of N acc subframes, wherein N acc represents a number of subframes in the given block; and

encode, at the eNodeB, the scrambled coded bits for transmission to the UE via the PDSCH,

wherein:

N acc is set to 1 when the scrambled coded bits to be transmitted via the PDSCH form a system information block type 1 (SIB1) bandwidth reduced (BR);

N acc is set to 4 for a frame structure type 1 and N acc is set to 10 for a frame structure type 2 when the scrambled coded bits to be transmitted via the PDSCH form a type of system information (SI) message other than a system information block type 1 (SIB1) bandwidth reduced (BR); and

N acc is set to 4 for a frame structure type 1 and N acc is set to 10 for a frame structure type 2 when the scrambled coded bits to be transmitted via the PDSCH form a paging message.

2. The apparatus of claim 1 , further comprising a transceiver configured to transmit the scrambled coded bits to the UE.

3. The apparatus of claim 1 , further comprising memory configured to store the scrambled coded bits for transmission to the UE via the PDSCH.

4. The apparatus of claim 1 , wherein the one or more processors are further configured to apply a same scrambling sequence per subframe to the PDSCH for the given block of N acc subframes.

5. The apparatus of claim 1 , wherein the one or more processors are further configured to initialize the scrambling sequence for a j th block of the N acc subframes using the defined initialization value (c init ), wherein c init =n RNTI ·2 14 +q·2 13 +[(j 0 +j)N acc mod 10]·2 9 +N ID cell , wherein n RNTI represents a radio network temporary identifier, q represents a given codeword, j 0 represents a first block in the N acc subframes, j represents a given block in the N acc subframes, and N ID CELL represents a cell identifier (ID).

6. The apparatus of claim 5 , wherein:

j

=

0

,

1

,

,

i

0

+

N

abs

PDSCH

+

i

Δ

-

1

N

acc

-

j

0

j

0

=

(

i

0

+

i

Δ

)

/

N

acc

i

Δ

=

{

0

,

for

frame

structure

type

1

N

acc

-

2

,

for

frame

structure

type

2

,

wherein N abs PDSCH represents a total number of absolute subframes spanned by a PDSCH with repetition, i 0 represents an absolute subframe number of a first downlink subframe intended for the PDSCH, and i Δ represents a change in the absolute subframe number.

7. The apparatus of claim 5 , wherein the n RNTI is set to a system information radio network temporary identifier (SI-RNTI) when the scrambled coded bits form the SIB1 or the type of SI message other than the SIB1 BR.

8. At least one non-transitory machine readable storage medium having instructions embodied thereon for applying scrambling to coded bits transported via a physical downlink shared channel (PDSCH) from an eNodeB to a user equipment (UE), the instructions when executed using one or more processors perform the following:

generating, at the eNodeB, coded bits for transmission to the UE, wherein the UE is a bandwidth-reduced low complexity (BL) UE or a coverage enhancement (CE) UE;

identifying, at the eNodeB, a scrambling sequence to be applied to the coded bits, wherein the scrambling sequence is initialized using a defined initialization value (c init );

applying, at the eNodeB, the scrambling sequence with the defined initialization value to the coded bits to obtain scrambled coded bits, wherein the scrambling sequence is applied per subframe to the PDSCH for a given block of N acc subframes, wherein N acc represents a number of subframes in the given block; and

encoding, at the eNodeB, the scrambled coded bits for transmission to the UE via the PDSCH,

wherein:

N acc is set to 1 when the scrambled coded bits to be transmitted via the PDSCH form a system information block type 1 (SIB1) bandwidth reduced (BR);

N acc is set to 4 for a frame structure type 1 and N acc is set to 10 for a frame structure type 2, when the scrambled coded bits to be transmitted via the PDSCH form a type of system information (SI) message other than a system information block type 1 (SIB1) bandwidth reduced (BR); and

N acc is set to 4 for a frame structure type 1 and N acc is set to 10 for a frame structure type 2, when the scrambled coded bits to be transmitted via the PDSCH form a paging message.

9. The at least one non-transitory machine readable storage medium of claim 8 , further comprising instructions when executed perform the following: applying a same scrambling sequence per subframe to the PDSCH for the given block of N acc subframes.

10. The at least one non-transitory machine readable storage medium of claim 9 , further comprising instructions when executed perform the following: initializing the scrambling sequence for a j th block of the N acc subframes using the defined initialization value (c init ), wherein c init =n RNTI ·2 14 +q·2 13 +[(j 0 +j)N acc mod 10]·2 9 +N ID cell , wherein n RNTI represents a radio network temporary identifier, q represents a given codeword, j 0 represents a first block in the N acc subframes, j represents a given block in the N acc subframes, and N ID cell represents a cell identifier (ID).

11. The at least one non-transitory machine readable storage medium of claim 10 , wherein:

j

=

0

,

1

,

,

i

0

+

N

abs

PDSCH

+

i

Δ

-

1

N

acc

-

j

0

j

0

=

(

i

0

+

i

Δ

)

/

N

acc

i

Δ

=

{

0

,

for

frame

structure

type

1

N

acc

-

2

,

for

frame

structure

type

2

,

wherein N abs PDSCH represents a total number of absolute subframes spanned by a PDSCH with repetition, i 0 represents an absolute subframe number of a first downlink subframe intended for the PDSCH, and i Δ represents a change in the absolute subframe number.

12. The at least one non-transitory machine readable storage medium of claim 10 , wherein the n RNTI is set to a system information radio network temporary identifier (SI-RNTI) when the scrambled coded bits form the SIB1 or the type of SI message other than the SIB1 BR.

13. The at least one non-transitory machine readable storage medium of claim 8 , wherein the coded bits generated at the eNodeB form a code word.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 056322/0723 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2018
From: CHATTERJEE, DEBDEEP
To: INTEL IP CORPORATION
Reel/Frame 047311/0056 →