Programming device arranged to obtain and store a random bit string in a memory device

1. A programming device arranged to obtain and store a random bit string in a memory device, the memory device comprising multiple one-time programmable memory cells, a memory cell having a programmed state and a not-programmed state, the memory cell being one-time programmable by changing the state from the not-programmed state to the programmed state through application of an electric burning energy to the memory cell, the memory cells being partitioned into multiple groups of memory cells, the programming device comprising:

a controllable energy source arranged to supply the electric burning energy, the controllable energy source having a control interface for controlling a size of the electric burning energy, the controllable energy source being arranged to apply the electric burning energy to a selected one of the multiple memory cells,

a status unit arranged to obtain the number of memory cells of the multiple memory cells that are in the programmed state,

a control unit arranged to iteratively apply the controllable energy source to a group of memory cells of the multiple groups of memory cells into which the memory cells are partitioned and increase the size of the electric burning energy through the control interface, until the number of memory cells in the programmed state reaches a threshold criterion, thus obtaining the random bit string stored in the multiple one-time programmable memory cells,

wherein the status unit is arranged to determine a number of memory cells programmed in a group of memory cells in a previous iteration, and wherein the control unit is arranged to:

increase the size of the electric burning energy if the number of memory cells programmed in a previous iteration is below a lower bound, and/or

decrease the size of the electric burning energy if the number of memory cells programmed in a previous iteration is above an upper bound.

2. A programming device as in claim 1 , wherein the threshold criterion is reached when the percentage of memory cells in the programmed state is at least a threshold percentage.

3. A programming device as in claim 2 , wherein the group of memory cells to which a particular electric burning energy is applied in an iteration before the threshold criterion is applied is determined before the iteration and is of size at least two, and the threshold percentage is below 50%.

4. A programming device as in claim 2 , wherein the group of memory cells to which a particular electric burning energy is applied in an iteration before the threshold criterion is applied is determined before the iteration and is of size at least two, and the threshold percentage is determined from an expected number of memory cells that will change from the not-programmed state to the programmed state.

5. A programming device as in claim 1 , wherein the control unit is arranged to apply a statistical randomness test to the multiple memory cells to estimate if the entropy in the multiple memory cells is sufficient, and to increase the number of memory cells in the multiple one-time programmable memory cells if the entropy according to the randomness test is insufficient.

6. A programming device as in claim 1 , comprising a random number generator, the group of memory cells to which the electric burning energy is applied being determined by the control unit from random numbers generated by the random number generator.

7. A programming device as in claim 1 , wherein the memory device comprises

a non-volatile helper data memory, and

a validation unit arranged to correct the data in the multiple memory cells using helper data in the helper data memory, the memory device or the programming device comprising

an authentication unit arranged to compute helper data over the data in the multiple memory cells after the threshold criterion has been reached, and to store the helper data in the helper data memory of the memory device, the helper data comprising redundancy information for the data in the multiple memory cells.

8. A programming device as in claim 7 , wherein

the authentication unit is arranged to compute a first hash over at least a first part of the data in the multiple memory cells after the threshold criterion has been reached, the helper data comprising the first hash, and

the validation unit is arranged to compute the first hash over the first part of the data in the multiple memory cells, and to compare the computed first hash with the stored first hash in the helper data memory, if the computed first hash and the stored first hash are different trying a limited number of corrections to the data until a hash computed over the corrected data equals the stored hash.

9. A programming device as in claim 7 , wherein

the authentication unit is arranged to

compute multiple hashes over multiple parts of the data in the multiple memory cells after the threshold criterion has been reached, at least some of the multiple parts overlapping, and

store the hash in the helper data memory of the memory device, and

the validation unit is arranged to

compute multiple hashes over the multiple parts of the data in the multiple memory cells,

compare the computed multiple hashes with the stored multiple hash in the helper data memory, and

if a first and second computed hash which are computed over overlapping parts, differ from the corresponding two stored hashes, then trying a limited number of corrections to the overlapping data until at least one of the first and second computed hash computed over the corrected part equals the corresponding stored hash.

10. A programming device as in claim 8 , wherein an overlap comprises multiple memory cells, preferably a multiple of 8 memory cells.

11. A programming device as in claim 8 , wherein the memory device has a reading unit arranged to access the multiple memory cells, the reading unit being controllable through a settings register,

the hash unit being arranged to compute a first hash over the settings register together with the first part, and store the first hash in the helper data memory, and/or

the hash unit being arranged to compute a first hash over the settings register together with the first part, and a second hash over the first part without the settings register, store the first and second hash in the helper data memory, and/or

the hash unit being arranged to

compute a first hash over the settings register together with the first part,

a second hash over the first part without the settings register,

a third hash over a second part,

store the first, second and third hash in the helper data memory.

12. A programming device as in claim 7 , wherein

the memory device comprises a non-decreasing counter comprising a further multiple of one-time programmable memory cells, and wherein the authentication unit is arranged to

determine a cryptographic verification key,

determine an authentication token computed over the helper data and the non-decreasing counter using the verification key,

store the authentication token in the helper data memory.

13. A programming device as in claim 1 , wherein the controllable energy source is configured to control one or more of a voltage, current and duration to control the size of the electric burning energy.

14. A programming device as in claim 1 , wherein

the controllable energy source is arranged to increase the electric burning energy to a writing level after the threshold criterion is reached, the control unit being arranged to apply the increased electric burning energy to memory cells in the multiple memory cells that are in the programmed state.

15. A memory device comprising the programming device claim 1 and the multiple one-time programmable memory cells.

16. A memory device as in claim 15 , wherein the multiple one-time programmable memory cells comprise

multiple fuses, and/or

multiple antifuses.

17. A memory device as in claim 15 , wherein a cryptographic key is determined from at least a subset of the multiple memory cells.

18. A memory device as in claim 17 comprising a further multiple one-time programmable memory cells, an identifier being stored in the further multiple one-time programmable memory cells, the cryptographic key being determined from the subset of the multiple memory cells and the identifier.

19. A memory device as in claim 17 , wherein the subset is randomly selected, addresses of memory cells in the subset being stored in yet further multiple one-time programmable memory cells.

20. A memory device arranged for use with a programming device, wherein the programming device is external to the memory device, the memory device comprising

multiple one-time programmable memory cells, a memory cell having a programmed state and a not-programmed state, the memory cell being one-time programmable by changing the state from the not-programmed state to the programmed state through application of an electric burning energy to the memory cell, the memory cells being partitioned into multiple groups of memory cells,

a controllable energy source interface arranged to receive the electric burning energy, the electric burning energy being provided by the programming device, and to apply the electric burning energy to a selected one of the multiple memory cells,

an internal status unit arranged to access the multiple one-time programmable memory cells and determine a number of memory cells programmed in a group of memory cells in a previous iteration of the programming device, and to send said number of memory cells to the programming device.

21. A programming device arranged to obtain and store a random bit string in a memory device comprising multiple one-time programmable memory cells, a memory cell having a programmed state and a not-programmed state, the memory cell being one-time programmable by changing the state from the not-programmed state to the programmed state through application of an electric burning energy to the memory cell, the memory cells being partitioned into multiple groups of memory cells, the programming device comprising:

a controllable energy source configured to supply the electric burning energy, control a size of the electric burning energy, and apply the electric burning energy to one or more selected cells of the multiple memory cells; and

circuitry configured to:

obtain a number of memory cells of the multiple memory cells that are in the programmed state;

control the energy source to iteratively supply the electric burning energy to a group of memory cells of the multiple groups of memory cells into which the memory cells are partitioned and to increase the size of the electric burning energy until the number of memory cells in the programmed state reaches a threshold criterion to obtain the random bit string stored in the multiple one-time programmable memory cells;

determine a number of memory cells programmed in a group of memory cells in a previous iteration; and

control the energy source to increase the size of the electric burning energy if the number of memory cells programmed in a previous iteration is below a lower bound and/or to decrease the size of the electric burning energy if the number of memory cells programmed in a previous iteration is above an upper bound.

22. A memory device arranged for use with a programming device, wherein the programming device is external to the memory device, the memory device comprising:

multiple one-time programmable memory cells, a memory cell having a programmed state and a not-programmed state, the memory cell being one-time programmable by changing the state from the not-programmed state to the programmed state through application of an electric burning energy to the memory cell, the memory cells being partitioned into multiple groups of memory cells;

a controllable energy source interface arranged to receive the electric burning energy, the electric burning energy being provided by the programming device, and apply the electric burning energy to a selected one of the multiple memory cells; and

circuitry configured to:

access the multiple one-time programmable memory cells to determine a number of memory cells programmed in a group of memory cells in a previous iteration of the programming device, and send said number of memory cells to the programming device.