IP Library Granted Patent US 10,573,660
Granted Patent B2
US 10,573,660 · App. 16/105,892 · Granted Feb 25, 2020

Semiconductor device and manufacturing method thereof

Inventors: Katsumi Yamamoto (Yokkaichi Mie, JP); Keisuke Kikutani (Yokkaichi Mie, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L27/11582H01L21/31144H01L21/76232H01L29/0649
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Quick Facts
Patent No.
US 10,573,660
App. No.
16/105,892
Granted
Feb 25, 2020
Kind
B2
Abstract

A semiconductor device includes a substrate, a stacked body provided on the substrate, a first insulator dividing the stacked body in a second direction crossing the first direction, a second insulator adjacent to the first insulator and dividing the stacked body in the second direction, a first hole, and a first insulating member. In the stacked body, a plurality of layers are stacked in a first direction perpendicular to the upper surface of the substrate. The first hole penetrates the stacked body and the first insulator in the first direction. The first insulating member penetrates the stacked body and the second insulator in the first direction and is adjacent to the first hole via a first electrode in a third direction crossing the first direction and the second direction, and has an opening diameter larger than that of the first insulator.

Claims (15)

1. A semiconductor device, comprising:

a substrate;

a stacked body provided on the substrate, in which a plurality of layers are stacked in a first direction perpendicular to an upper surface of the substrate;

a first insulator that divides the stacked body in a second direction crossing the first direction;

a second insulator that is adjacent to the first insulator and divides the stacked body in the second direction;

a first hole that penetrates the stacked body and the first insulator in the first direction; and

a first insulating member that penetrates the stacked body and the second insulator in the first direction and is adjacent to the first hole via a first electrode in a third direction crossing the first direction and the second direction, the first insulating member having an opening diameter larger than a diameter of the first insulator.

2. The semiconductor device according to claim 1 ,

wherein the first hole has a larger diameter than the diameter of the first insulator,

the semiconductor device further comprising memory cell films facing each other across the second insulator in the first hole or surrounding the second insulator in the first hole, wherein the memory cell films including a first insulating layer, a second insulating layer, a third insulating layer and a semiconductor layer.

3. The semiconductor device according to claim 1 , wherein an upper end shape of the first hole and the first insulating member is a rectangle.

4. The semiconductor device according to claim 1 , further comprising:

a second insulating member that faces the first insulating member via the first hole and has an opening diameter larger than the diameter of the first insulator,

wherein the second insulating member is adjacent to the first hole via a second electrode electrically insulated from the first electrode in the third direction.

5. The semiconductor device according to claim 4 , comprising a plurality of the first holes adjacent to each other at a first pitch in the second direction between the first insulating member and the second insulating member.

Assignments (4)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2018
From: YAMAMOTO, KATSUMI; KIKUTANI, KEISUKE
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 047438/0971 →
Priority Claims (1)
JP 2018-053207 · Mar 20, 2018 · national
Continuity (1)
Related Publication 20190296036A1 · Sep 26, 2019