Semiconductor device including an n-type carrier stored layer, power conversion device, and method of manufacturing the semiconductor device
A semiconductor device includes: an n-type semiconductor substrate; a p-type base layer formed on a surface of the n-type semiconductor substrate; an n-type emitter layer formed on the p-type base layer, a trench gate penetrating through the p-type base layer and the n-type emitter layer; an n-type carrier stored layer formed between the n-type semiconductor substrate and the p-type base layer and having a higher concentration than that of the n-type semiconductor substrate; and a p-type collector layer formed on a back surface of the n-type semiconductor substrate, wherein with respect to the n-type carrier stored layer, a concentration gradient directing from a position of a peak concentration to the back surface of the n-type semiconductor substrate is larger than a concentration gradient directing from the position of the peak concentration to the p-type base layer, and a proton is implanted in the n-type carrier stored layer as an impurity.
1. A semiconductor device comprising:
an n-type semiconductor substrate;
a p-type base layer formed on a surface of the n-type semiconductor substrate;
an n-type emitter layer formed on the p-type base layer;
a trench gate penetrating through the p-type base layer and the n-type emitter layer;
an n-type carrier stored layer formed between the n-type semiconductor substrate and the p-type base layer and having a higher concentration than that of the n-type semiconductor substrate; and
a p-type collector layer formed on a back surface of the n-type semiconductor substrate,
wherein with respect to the n-type carrier stored layer, a concentration gradient directing from a position of a peak concentration to the back surface of the n-type semiconductor substrate is larger than a concentration gradient directing from the position of the peak concentration to the p-type base layer, and the concentration of the n-type carrier stored layer decreases from near the n-type semiconductor substrate to near the p-type base layer, and
a proton is implanted in the n-type carrier stored layer as an impurity.
2. The semiconductor device according to claim 1 , wherein a depth of the n-type carrier stored layer is shallower than that of the trench gate.
3. The semiconductor device according to claim 1 , wherein the n-type semiconductor substrate includes the p-type base layer, the n-type emitter layer, a MOS region in which the trench gate is formed, and a peripheral region arranged on an outer periphery of the MOS region for maintaining a withstand voltage, and
the n-type carrier stored layer is formed in the MOS region, but not formed in the peripheral region.
4. The semiconductor device according to claim 2 , wherein the n-type semiconductor substrate includes the p-type base layer, the n-type emitter layer, a MOS region in which the trench gate is formed, and a peripheral region arranged on an outer periphery of the MOS region for maintaining a withstand voltage, and
the n-type carrier stored layer is formed in the MOS region, but not formed in the peripheral region.
5. The semiconductor device according to claim 1 , wherein the n-type semiconductor substrate is made of a wide-band-gap semiconductor.
6. The semiconductor device according to claim 2 , wherein the n-type semiconductor substrate is made of a wide-band-gap semiconductor.
7. The semiconductor device according to claim 3 , wherein the n-type semiconductor substrate is made of a wide-band-gap semiconductor.
8. The semiconductor device according to claim 4 , wherein the n-type semiconductor substrate is made of a wide-band-gap semiconductor.
9. An electric power conversion device comprising:
a main conversion circuit including a semiconductor device, converting input power and outputting converted power; and
a control circuit outputting a control signal for controlling the main conversion circuit to the main conversion circuit,
wherein the semiconductor device includes:
an n-type semiconductor substrate;
a p-type base layer formed on a surface of the n-type semiconductor substrate;
an n-type emitter layer formed on the p-type base layer;
a trench gate penetrating through the p-type base layer and the n-type emitter layer;
an n-type carrier stored layer formed between the n-type semiconductor substrate and the p-type base layer and having a higher concentration than that of the n-type semiconductor substrate; and
a p-type collector layer formed on a back surface of the n-type semiconductor substrate,
wherein with respect to the n-type carrier stored layer, a concentration gradient directing from a position of a peak concentration to the back surface of the n-type semiconductor substrate is larger than a concentration gradient directing from the position of the peak concentration to the p-type base layer and the concentration of the n-type carrier stored layer decreases from near the n-type semiconductor substrate to near the p-type base layer, and
a proton is implanted in the n-type carrier stored layer as an impurity.