Temperature compensation in memory sensing

1. An apparatus, comprising:

an array of memory cells;

a data line selectively connected to a memory cell of the array of memory cells;

a sense circuit, comprising:

a sense node selectively connected to the data line;

a precharge transistor connected between the sense node and a voltage node and having a control gate configured to receive a first control signal, a first source/drain connected to the sense node, and a second source/drain;

a sense transistor connected between the voltage node and the second source/drain of the precharge transistor and having a control gate connected to the sense node, a first source/drain connected to the second source/drain of the precharge transistor, and a second source/drain; and

a sense enable transistor connected between the voltage node and the second source/drain of the sense transistor and having a control gate configured to receive a second control signal, a first source/drain connected to the second source/drain of the sense transistor, and a second source/drain connected to the voltage node; and

a controller configured to perform a sense operation on a selected memory cell of the array of memory cells using the sense circuit, wherein the controller is further configured to selectively vary at least one attribute of the sense operation in response to an indication of a sensed temperature, the at least one attribute selected from a group consisting of a sense node develop time during the sense operation, a ratio of a deboost voltage level capacitively decoupled from the sense node to a boost voltage level capacitively coupled to the sense node during the sense operation, and a precharge voltage level of the sense node during the sense operation.

2. The apparatus of claim 1 , further comprising:

a temperature sensor in communication with the controller for use in generating the indication of the sensed temperature.

3. The apparatus of claim 2 , wherein the temperature sensor is internal to the apparatus.

4. The apparatus of claim 1 , wherein the controller is further configured to vary the at least one attribute of the sense operation when the indication of the sensed temperature indicates a temperature in a particular range of temperatures.

5. The apparatus of claim 4 , wherein the controller is further configured to vary the at least one attribute of the sense operation only when the indication of the sensed temperature indicates a temperature in one or more subsets of temperatures of the particular range of temperatures.

6. The apparatus of claim 1 , wherein the controller is further configured to selectively vary the ratio of the deboost voltage level to the boost voltage level by fixing a value of one of the boost voltage level and the deboost voltage level, and varying the value of the other one of the boost voltage level and the deboost voltage level.

7. An apparatus, comprising:

an array of memory cells;

a data line selectively connected to a memory cell of the array of memory cells; and

a sense circuit, comprising:

a sense node selectively connected to the data line;

a precharge transistor connected between the sense node and a voltage node and having a control gate configured to receive a first control signal, a first source/drain connected to the sense node, and a second source/drain;

a sense transistor connected between the voltage node and the second source/drain of the precharge transistor and having a control gate connected to the sense node, a first source/drain connected to the second source/drain of the precharge transistor, and a second source/drain connected to the voltage node; and

a sense enable transistor connected between the second source/drain of the precharge transistor and an output of the sense circuit and having a control gate configured to receive a second control signal, a first source/drain connected to the second source/drain of the precharge transistor, and a second source/drain; and

a controller configured to perform a sense operation on a selected memory cell of the array of memory cells using the sense circuit, wherein the controller is further configured to selectively vary at least one attribute of the sense operation in response to an indication of a sensed temperature, the at least one attribute selected from a group consisting of a sense node develop time during the sense operation, a ratio of a deboost voltage level capacitively decoupled from the sense node to a boost voltage level capacitively coupled to the sense node during the sense operation, and a precharge voltage level of the sense node during the sense operation;

wherein the controller is further configured to vary the at least one attribute of the sense operation when the indication of the sensed temperature indicates a temperature in a particular range of temperatures.

8. The apparatus of claim 7 , further comprising:

a temperature sensor in communication with the controller for use in generating the indication of the sensed temperature.

9. The apparatus of claim 8 , wherein the temperature sensor is internal to the apparatus.

10. The apparatus of claim 7 , wherein the controller is further configured to vary the at least one attribute of the sense operation only when the indication of the sensed temperature indicates a temperature in one or more subsets of temperatures of the particular range of temperatures.

11. The apparatus of claim 7 , further comprising a latch connected between the output of the sense circuit and the second source/drain of the sense enable transistor.

12. An apparatus, comprising:

an array of memory cells;

a data line selectively connected to a memory cell of the array of memory cells; and

a sense circuit, comprising:

a sense node selectively connected to the data line;

a precharge transistor connected between the sense node and a voltage node and having a control gate configured to receive a first control signal, a first source/drain connected to the sense node, and a second source/drain;

a sense transistor connected between the voltage node and the second source/drain of the precharge transistor and having a control gate connected to the sense node, a first source/drain connected to the second source/drain of the precharge transistor, and a second source/drain connected to the voltage node; and

a sense enable transistor connected between the second source/drain of the precharge transistor and an output of the sense circuit and having a control gate configured to receive a second control signal, a first source/drain connected to the second source/drain of the precharge transistor, and a second source/drain; and

a controller configured to perform a sense operation on a selected memory cell of the array of memory cells using the sense circuit, wherein the controller is further configured to selectively vary at least one attribute of the sense operation in response to an indication of a sensed temperature, the at least one attribute selected from a group consisting of a sense node develop time during the sense operation, a ratio of a deboost voltage level capacitively decoupled from the sense node to a boost voltage level capacitively coupled to the sense node during the sense operation, and a precharge voltage level of the sense node during the sense operation;

wherein the controller is further configured to selectively vary the ratio of the deboost voltage level to the boost voltage level by fixing a value of one of the boost voltage level and the deboost voltage level, and varying the value of the other one of the boost voltage level and the deboost voltage level.

13. A method of operating a memory, comprising:

generating an indication of a sensed temperature; and

selectively varying a value of a precharge voltage level of a sense node during a sense operation of the memory;

wherein varying the value of the precharge voltage level comprises varying a voltage level of a control signal applied to a control gate of a transistor, having a first source/drain connected to the sense node and a second source/drain connected to a voltage node, in response to the indication of the sensed temperature.

14. A method of operating a memory, comprising:

generating an indication of a sensed temperature;

selectively varying a value of a precharge voltage level of a sense node during a sense operation of the memory; and

selectively varying a respective value of at least one attribute of the sense operation of the memory in response to the indication of the sensed temperature, the at least one attribute selected from a group consisting of a sense node develop time during the sense operation, and a ratio of a deboost voltage level capacitively decoupled from the sense node to a boost voltage level capacitively coupled to the sense node during the sense operation;

wherein varying the value of the precharge voltage level comprises varying a voltage level of a control signal applied to a control gate of a transistor, connected between and in series with the sense node and a voltage node, in response to the indication of the sensed temperature.

15. A method of operating a memory, comprising:

generating an indication of a sensed temperature and selectively varying a value of a precharge voltage level of a sense node during a sense operation of the memory;

wherein varying the value of the precharge voltage level comprises varying a voltage level of a control signal applied to a control gate of a transistor, connected between and in series with the sense node and a voltage node, in response to the indication of the sensed temperature; and

wherein varying the voltage level of the control signal comprises varying the voltage level of the control signal as a decreasing function of the sensed temperature.

16. A method of operating a memory, comprising:

generating an indication of a sensed temperature; and

selectively varying a value of a precharge voltage level of a sense node during a sense operation of the memory;

wherein varying the value of the precharge voltage level comprises varying a voltage level of a control signal applied to a control gate of a transistor, connected between and in series with the sense node and a voltage node, in response to the indication of the sensed temperature; and

wherein varying the voltage level of the control signal applied to the control gate of the transistor comprises applying a first voltage level to the control gate of the transistor when the indication of the sensed temperature indicates any temperature in a first range of temperatures, and applying a second voltage level, lower than the first voltage level, to the control gate of the transistor when the indication of the sensed temperature indicates any temperature in a second range of temperatures higher than the first range of temperatures.

17. A method of operating a memory, comprising:

generating an indication of a sensed temperature; and

selectively varying a value of a precharge voltage level of a sense node during a sense operation of the memory;

wherein varying the value of the precharge voltage level comprises varying a voltage level of a control signal applied to a control gate of a transistor, connected between and in series with the sense node and a voltage node, in response to the indication of the sensed temperature; and

wherein selectively varying the value of the precharge voltage level of the sense node comprises varying the value of the precharge voltage level of the sense node only when a temperature corresponding to the indication of the sensed temperature is lower than or higher than a particular range of temperatures.