IP Library Granted Patent US 10,817,347
Granted Patent B2
US 10,817,347 · App. 16/116,654 · Granted Oct 27, 2020

Entanglement of pages and guest threads

Inventors: Isaac R. Nassi (Los Gatos, CA); David P. Reed (Needham, MA); Mark Hill (Los Altos, CA)
Assignee: TidalScale, Inc.
G06F9/5077G06F9/3009G06F9/30123G06F9/3836G06F9/45558G06F2009/4557G06F2009/45583
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,817,347
App. No.
16/116,654
Granted
Oct 27, 2020
Kind
B2
Abstract

Entanglement of pages and threads is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is an entangled portion of memory that is entangled with a physical node in a plurality of physical nodes. A type of the entangled portion of memory is determined. The stalling event is handled based at least in part on the determined type of the entangled portion of memory.

Claims (47)

1. A system, comprising:

a plurality of physical nodes;

wherein an indication is received of a stalling event caused by a requested portion of memory being inaccessible;

wherein it is determined that the requested portion of memory is an entangled portion of memory that is designated as entangled with a physical node in the plurality of physical nodes;

wherein it is determined that the entangled portion of memory is a portion of memory that is specific to a given thread;

wherein, based at least in part on the determination that the entangled portion of memory is specific to the given thread, it is determined that a thread context switch has occurred; and

wherein the stalling event is handled based at least in part on the determination that the entangled portion of memory is specific to the given thread.

2. The system recited in claim 1 wherein the portion of memory comprises at least one of a thread state page and a top of stack page.

3. The system recited in claim 1 wherein based at least in part on the determination that the entangled portion of memory is a portion of memory that is specific to the given thread, the stalling event is handled at least in part by migrating a virtual processor to the physical node with which the portion of memory is entangled.

4. A method, comprising:

receiving an indication of a stalling event caused by a requested portion of memory being inaccessible;

determining that the requested portion of memory is an entangled portion of memory that is designated as entangled with a physical node in a plurality of physical nodes;

determining that the entangled portion of memory is a portion of memory that is specific to a given thread;

based at least in part on the determination that the entangled portion of memory is specific to the given thread, determining that a thread context switch has occurred; and

handling the stalling event based at least in part on the determination that the entangled portion of memory is specific to the given thread.

5. The method of claim 4 wherein the portion of memory comprises at least one of a thread state page and a top of stack page.

6. The method of claim 4 wherein based at least in part on the determination that the entangled portion of memory is a portion of memory that is specific to the given thread, the stalling event is handled at least in part by migrating a virtual processor to the physical node with which the portion of memory is entangled.

7. A system, comprising:

a plurality of physical nodes;

wherein an indication is received of a stalling event caused by a requested portion of memory being inaccessible;

wherein it is determined that the requested portion of memory is an entangled portion of memory that is designated as entangled with a physical node in the plurality of physical nodes;

wherein it is determined that the entangled portion of memory is a portion of memory that is specific to a given thread, and wherein the portion of memory comprises at least one of a thread state page and a top of stack page; and

wherein the stalling event is handled based at least in part on the determination that the entangled portion of memory is specific to the given thread.

8. The system recited in claim 7 wherein, based at least in part on the determination that the entangled portion of memory is specific to the given thread, it is determined that a thread context switch has occurred.

9. The system recited in claim 7 wherein based at least in part on the determination that the entangled portion of memory is a portion of memory that is specific to the given thread, the stalling event is handled at least in part by migrating a virtual processor to the physical node with which the portion of memory is entangled.

10. A method, comprising:

receiving an indication of a stalling event caused by a requested portion of memory being inaccessible;

determining that the requested portion of memory is an entangled portion of memory that is designated as entangled with a physical node in a plurality of physical nodes;

determining that the entangled portion of memory is a portion of memory that is specific to a given thread, wherein the portion of memory comprises at least one of a thread state page and a top of stack page; and

handling the stalling event based at least in part on the determination that the entangled portion of memory is specific to the given thread.

11. The method of claim 10 wherein, based at least in part on the determination that the entangled portion of memory is specific to the given thread, it is determined that a thread context switch has occurred.

12. The method of claim 10 wherein based at least in part on the determination that the entangled portion of memory is a portion of memory that is specific to the given thread, the stalling event is handled at least in part by migrating a virtual processor to the physical node with which the portion of memory is entangled.

13. A system, comprising:

a plurality of physical nodes;

wherein an indication is received of a stalling event caused by a requested portion of memory being inaccessible;

wherein it is determined that the requested portion of memory is an entangled portion of memory that is designated as entangled with a physical node in the plurality of physical nodes;

wherein it is determined that the entangled portion of memory is a portion of memory that is specific to a given thread; and

wherein based at least in part on the determination that the entangled portion of memory is a portion of memory that is specific to the given thread, the stalling event is handled at least in part by migrating a virtual processor to the physical node with which the portion of memory is entangled.

14. The system recited in claim 13 wherein, based at least in part on the determination that the entangled portion of memory is specific to the given thread, it is determined that a thread context switch has occurred.

15. The system recited in claim 13 wherein the portion of memory comprises at least one of a thread state page and a top of stack page.

16. A method, comprising:

receiving an indication of a stalling event caused by a requested portion of memory being inaccessible;

determining that the requested portion of memory is an entangled portion of memory that is designated as entangled with a physical node in a plurality of physical nodes;

determining that the entangled portion of memory is a portion of memory that is specific to a given thread; and

based at least in part on the determination that the entangled portion of memory is a portion of memory that is specific to a given thread, handling the stalling event at least in part by migrating a virtual processor to the physical node with which the portion of memory is entangled.

17. The method of claim 16 wherein, based at least in part on the determination that the entangled portion of memory is specific to the given thread, it is determined that a thread context switch has occurred.

18. The method of claim 16 wherein the portion of memory comprises at least one of a thread state page and a top of stack page.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2023
From: TIDALSCALE, INC.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 062282/0452 →
RELEASE OF SECURITY INTEREST RECORDED AT REEL/FRAME 060724/0458 Recorded Dec 30, 2022
From: COMERICA BANK
To: TIDALSCALE, INC.
Reel/Frame 062252/0199 →
RELEASE OF SECURITY INTEREST Recorded Dec 15, 2022
From: COMERICA BANK
To: TIDALSCALE, INC.
Reel/Frame 062108/0963 →
SECURITY INTEREST Recorded Aug 4, 2022
From: TIDALSCALE, INC.
To: COMERICA BANK
Reel/Frame 060724/0458 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2018
From: NASSI, ISAAC R.; REED, DAVID P.; HILL, MARK
To: TIDALSCALE, INC.
Reel/Frame 047399/0330 →
Continuity (2)
Provisional Application 62553005 · Aug 31, 2017
Related Publication 20190065279A1 · Feb 28, 2019
Cited By (1)
US 12,445,532