Channel encoding method and apparatus in wireless communications to output a polar encoded bit sequence
This application provides an encoding method and apparatus in wireless communications between a network device and a terminal. The method includes: performing CRC encoding on A to-be-encoded information bits based on a CRC polynomial, to obtain a first bit sequence, where the first bit sequence includes L CRC bits and A information bits, L=11; and performing polar encoding on the first bit sequence. Based on an improved CRC polynomial, encoding satisfying an FAR requirement is implemented.
1. An encoding method, comprising:
performing, by a transmit end and based on a cyclic redundancy check (CRC) polynomial, CRC encoding on A to-be-encoded information bits, to obtain a CRC-encoded bit sequence, wherein the CRC-encoded bit sequence comprises L CRC bits and the A to-be-encoded information bits, L and A are positive integers, L=11, and the CRC polynomial is any one of the following polynomials:
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}5+1;
D{circumflex over ( )}11+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}6+D{circumflex over ( )}4+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}5+D{circumflex over ( )}4+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; or
D{circumflex over ( )}11+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; and
performing, by the transmit end, polar encoding on the CRC-encoded bit sequence to obtain a polar-encoded bit sequence;
outputting, by the transmit end, the polar-encoded bit sequence.
2. The method according to claim 1 , wherein the CRC polynomial is implemented by using a shift register.
3. The method according to claim 1 , wherein the L CRC bits in the CRC-encoded bit sequence are located after the A to-be-encoded information bits.
4. The method according to claim 1 , wherein the method further comprises:
sending, by the transmit end, the polar-encoded bit sequence.
5. The method according to claim 4 , wherein before sending the polar-encoded bit sequence, the transmit end performs rate matching on the polar-encoded bit sequence based on a target code length.
6. The method according to claim 1 , wherein the transmit end is a base station or a terminal.
7. An encoding apparatus, comprising a processor, wherein the processor is configured to:
perform, based on a cyclic redundancy check (CRC) polynomial, CRC encoding on A to-be-encoded information bits, to obtain a CRC-encoded bit sequence, wherein the CRC-encoded bit sequence comprises L CRC bits and the A to-be-encoded information bits, L and A are positive integers, L=11, and the CRC polynomial is any one of the following polynomials:
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}5+1;
D{circumflex over ( )}11+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}6+D{circumflex over ( )}4+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}5+D{circumflex over ( )}4+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; or
D{circumflex over ( )}11+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; and
perform polar encoding on the CRC-encoded bit sequence to obtain a polar-encoded bit sequence;
output the polar-encoded bit sequence.
8. The apparatus according to claim 7 , wherein the encoding apparatus further comprises a memory, and the memory is configured to store a program instruction executed by the processor.
9. The apparatus according to claim 7 , wherein the CRC polynomial is implemented by using a shift register.
10. The apparatus according to claim 7 , wherein the L CRC bits in the CRC-encoded bit sequence are located after the A to-be-encoded information bits.
11. The apparatus according to claim 7 , wherein the apparatus further comprises a transceiver, configured to send the polar-encoded bit sequence.
12. The apparatus according to claim 11 , wherein before the transceiver sends the polar-encoded bit sequence, the processor is further configured to perform rate matching on the polar-encoded bit sequence based on a target code length.
13. The apparatus according to claim 7 , wherein the apparatus is a base station or a terminal.
14. An encoding apparatus, comprising:
an input interface, configured to obtain A to-be-encoded information bits;
a logic circuit, configured to: perform, based on a cyclic redundancy check (CRC) polynomial, CRC encoding on the A to-be-encoded information bits, to obtain a CRC-encoded bit sequence, wherein the CRC-encoded bit sequence comprises L CRC bits and the A to-be-encoded information bits, L and A are positive integers, L=11, and the CRC polynomial is any one of the following polynomials:
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}5+1;
D{circumflex over ( )}11+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}6+D{circumflex over ( )}4+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}5+D{circumflex over ( )}4+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D 9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; or
D{circumflex over ( )}11+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; and
perform polar encoding on the CRC-encoded bit sequence to obtain a polar-encoded bit sequence; and
an output interface, configured to output the polar-encoded bit sequence.
15. The apparatus according to claim 14 , wherein the CRC polynomial is implemented by using a shift register.
16. The apparatus according to claim 14 , wherein the L CRC bits in the CRC-encoded bit sequence are located after the A to-be-encoded information bits.
17. The apparatus according to claim 14 , wherein the logic circuit is further configured to: before the output interface outputs the polar-encoded bit sequence, perform rate matching on the polar-encoded bit sequence based on a target code length.
18. A system, comprising:
an processor, configured to obtain A to-be-encoded information bits, that performs, a cyclic redundancy check (CRC) encoding using a CRC polynomial on the A to-be-encoded information bits to obtain a CRC-encoded bit sequence and applies a polar encoding to the CRC-encoded bit sequence, wherein the CRC-encoded bit sequence comprises L CRC bits and the A to-be-encoded information bits, L and A are positive integers, L=11, and the CRC polynomial is any one of the following polynomials:
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}5+1;
D{circumflex over ( )}11+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}6+D{circumflex over ( )}4+D{circumflex over ( )}2+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}5+D{circumflex over ( )}4+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}8+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D+1;
D{circumflex over ( )}11+D{circumflex over ( )}10+D{circumflex over ( )}9+D{circumflex over ( )}7+D{circumflex over ( )}6+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; or
D{circumflex over ( )}11+D{circumflex over ( )}8+D{circumflex over ( )}6+D{circumflex over ( )}5+D{circumflex over ( )}4+D{circumflex over ( )}3+D{circumflex over ( )}2+D+1; and
a transceiver to transmit the polar-encoded bit sequence.
19. The system according to claim 18 , wherein the CRC polynomial is implemented by using a shift register.
20. The system according to claim 18 , wherein the L CRC bits in the CRC-encoded bit sequence are located after the A to-be-encoded information bits.