IP Library Granted Patent US 11,196,142
Granted Patent B2
US 11,196,142 · App. 16/118,785 · Granted Dec 7, 2021

Millimeter wave antenna and EMI shielding integrated with fan-out package

Inventor: Owen R. Fay (Meridian, ID)
Assignee: Micron Technology, Inc.
H01Q1/2283H01L21/02104H01L23/481
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Quick Facts
Patent No.
US 11,196,142
App. No.
16/118,785
Granted
Dec 7, 2021
Kind
B2
Abstract

Systems and methods of manufacture are disclosed for a semiconductor device assembly having a semiconductor device having a first side and a second side opposite of the first side, a mold compound region adjacent to the semiconductor device, a redistribution layer adjacent to the first side of the semiconductor device, a dielectric layer adjacent to the second side of the semiconductor device, a first via extending through the mold compound region that connects to at least one trace in the dielectric layer, and an antenna structure formed on the dielectric layer and connected to the semiconductor device through the first via.

Claims (43)

1. A semiconductor device assembly comprising:

a semiconductor device having a first side and a second side opposite of the first side;

a mold compound region adjacent to the semiconductor device;

a redistribution layer adjacent to the first side of the semiconductor device;

a dielectric layer adjacent to the second side of the semiconductor device;

one or more vias extending through the mold compound region and connected to at least one trace in the dielectric layer;

an antenna structure formed on the dielectric layer, the antenna structure comprising at least two portions, and each of the at least two portions are connected to a selectable connection means that is connected to the semiconductor device through the one or more vias and the size of the antenna structure changes depending upon the number of the at least two portions selected to be connected to the semiconductor device.

2. The semiconductor device assembly of claim 1 wherein the antenna structure is a 5 g millimeter wave antenna.

3. The semiconductor device assembly of claim 1 wherein the selectable connection means comprises a fuse, a switch, or a severable connection.

4. The semiconductor device assembly of claim 1 wherein the first side of the semiconductor device is a live surface of the semiconductor device.

5. The semiconductor device assembly of claim 1 further comprising:

one or more second vias extending through the mold compound region and connected to at least one trace in the dielectric layer; and

a second antenna structure formed on the dielectric layer and connected to the semiconductor device through the one or more second vias.

6. A semiconductor device assembly comprising:

a semiconductor device having a first side;

a mold compound region;

a first redistribution layer adjacent to the first side of the semiconductor device, the first redistribution layer configured to connect the semiconductor device to an external device;

a second redistribution layer adjacent to the first redistribution layer; and

a plurality of antenna structures formed in the second redistribution layer, the semiconductor device connected to each of the plurality of antenna structures through the first redistribution layer and through a selectable connection means wherein each of the plurality of antenna structures is configured to be selectably disconnected from the semiconductor device to change the size of the plurality of antenna structures.

7. The semiconductor device assembly of claim 6 wherein at least one of the plurality of antenna structures is a 5 g millimeter wave antenna.

8. The semiconductor device assembly of claim 6 wherein selectable connection means comprises a fuse, a switch, or a severable connection.

9. The semiconductor device assembly of claim 6 wherein the first side of the semiconductor device is a live surface of the semiconductor device.

10. A semiconductor device assembly comprising:

a package-on-package assembly comprising:

a first semiconductor device;

at least one via; and

a second semiconductor device connected to the first semiconductor device through the at least one via; and

a plurality of antenna structures selectively connectable to at least one of the first semiconductor device or the second semiconductor device through the at least one via, wherein each of the plurality of antenna structures is configured to be selectively disconnected from the semiconductor device to change the size of the plurality of antenna structures.

11. The semiconductor device assembly of claim 10 wherein the plurality of antenna structures are located between the first semiconductor device and the second semiconductor device.

12. The semiconductor device assembly of claim 11 further comprising:

an additional antenna structure located on a back side of the package-on-package assembly.

13. The semiconductor device assembly of claim 10 wherein the plurality of antenna structures are located on a back side of the package-on-package assembly.

14. The semiconductor device assembly of claim 10 wherein at least one of the plurality of antenna structures is a 5 g millimeter wave antenna.

15. The semiconductor device assembly of claim 10 wherein at least one of the plurality of antenna structures is a tunable antenna.

16. A semiconductor device assembly comprising:

a semiconductor device having an active side and a back side;

a mold compound region;

a first redistribution layer adjacent to the back side of the semiconductor device;

an electromagnetic interference (EMI) shield located in the first redistribution layer;

a second redistribution layer located above the first redistribution layer; and

an antenna structure formed in the second redistribution layer the antenna structure comprising at least two portions and each of the at least two portions are connected to a selectable connection means that is connected to the semiconductor device through a via and the size of the antenna structure changes depending upon the number of the at least two portions selected to be connected to the semiconductor device.

17. The semiconductor device assembly of claim 16 wherein the antenna structure is a 5 g millimeter wave antenna.

18. The semiconductor device assembly of claim 16 wherein the selectable connection means comprises a fuse, a switch, or a severable connection.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 14, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051028/0835 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050719/0550 →
SUPPLEMENT NO. 1 TO PATENT SECURITY AGREEMENT Recorded Nov 13, 2018
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A.., AS COLLATERAL AGENT
Reel/Frame 047630/0756 →
SUPPLEMENT NO. 10 TO PATENT SECURITY AGREEMENT Recorded Nov 13, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048102/0420 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2018
From: FAY, OWEN R.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046765/0979 →
Continuity (1)
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