IP Library Granted Patent US 10,672,679
Granted Patent B2
US 10,672,679 · App. 16/118,889 · Granted Jun 2, 2020

Heat spreaders for multiple semiconductor device modules

Inventor: Xiaopeng Qu (Boise, ID)
Assignee: Micron Technology, Inc.
H01L23/367G06F1/20H05K7/2039H05K7/20172
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Quick Facts
Patent No.
US 10,672,679
App. No.
16/118,889
Granted
Jun 2, 2020
Kind
B2
Abstract

A heat spreader for use in a memory system is provided, including a thermally conductive body having a first planar side surface and a second planar side surface opposite the first planar side surface, the first planar side surface configured to attach to a first plurality of co-planar semiconductor devices of a first memory module of the memory system, the second planar side surface configured to attach to a second plurality of co-planar semiconductor devices of a second memory module of the memory system, wherein the first planar side surface and the second planar side surface are separated by a body width w substantially equal to a distance between the first plurality of co-planar semiconductor devices and the second plurality of co-planar semiconductor devices.

Claims (30)

1. A heat spreader configured for use in a memory system, comprising:

a monolithic thermally conductive body having a first planar side surface and a second planar side surface opposite the first planar side surface, the first planar side surface configured to attach to a first plurality of co-planar semiconductor devices of a first memory module of the memory system, the second planar side surface configured to attach to a second plurality of co-planar semiconductor devices of a second memory module of the memory system,

wherein the first planar side surface and the second planar side surface are separated by a body width w substantially equal to a distance between the first plurality of co-planar semiconductor devices and the second plurality of co-planar semiconductor devices.

2. The heat spreader of claim 1 , wherein the thermally conductive body includes a plurality of air channels extending between the first and second planar side surfaces.

3. The heat spreader of claim 2 , wherein the plurality of air channels is configured to receive a forced air flow from a fan disposed at an end surface of the thermally conductive body.

4. The heat spreader of claim 2 , wherein the plurality of air channels is defined by an internal corrugation of the thermally conductive body.

5. The heat spreader of claim 1 , further comprising:

a first layer of thermally conductive adhesive disposed on the first planar side surface and configured to attach the first planar side surface to the first plurality of co-planar semiconductor devices; and

a second layer of thermally conductive adhesive disposed on the second planar side surface and configured to attach the second planar side surface to the second plurality of co-planar semiconductor devices.

6. The heat spreader of claim 1 , wherein the thermally conductive body is a first thermally conductive body further including a top surface configured to be attached to a second thermally conductive body.

7. The heat spreader of claim 1 , wherein the first and second memory modules are DDR5 DRAM memory modules.

8. The heat spreader of claim 1 , wherein the body width w is between 2 and 6 mm.

9. The heat spreader of claim 1 , wherein the thermally conductive body comprises copper, aluminum, a combination thereof, or an alloy thereof.

10. A memory system comprising:

a first memory module including a first plurality of co-planar semiconductor devices;

a second memory module including a second plurality of co-planar semiconductor devices; and

a heat spreader including a monolithic thermally conductive body having a first planar side surface attached to the first plurality of co-planar semiconductor devices and a second planar side surface attached to the second plurality of co-planar semiconductor devices,

wherein the first planar side surface and the second planar side surface are separated by a body width w substantially equal to a distance between the first plurality of co-planar semiconductor devices and the second plurality of co-planar semiconductor devices.

11. The memory system of claim 10 , wherein the thermally conductive body includes a plurality of air channels extending between the first and second planar side surfaces.

12. The memory system of claim 11 , wherein the plurality of air channels is configured to receive a forced air flow from a fan disposed at an end surface of the thermally conductive body.

13. The memory system of claim 11 , wherein the plurality of air channels is defined by an internal corrugation of the thermally conductive body.

14. The memory system of claim 10 , further comprising:

a first layer of thermally conductive adhesive attaching the first planar side surface to the first plurality of co-planar semiconductor devices; and

a second layer of thermally conductive adhesive attaching the second planar side surface to the second plurality of co-planar semiconductor devices.

15. The memory system of claim 10 , wherein the heat spreader is a first heat spreader and the thermally conductive body is a first thermally conductive body, and further including a second heat spreader having a second thermally conductive body attached to a top surface of the first thermally conductive body.

16. The memory system of claim 15 , wherein the second thermally conductive body includes a plurality of radiating structures configured to exchange heat.

17. The memory system of claim 15 , further comprising a fan configured to direct a forced air flow over the second thermally conductive body.

18. The memory system of claim 10 , wherein the first and second memory modules are DDR5 DRAM memory modules.

19. The memory system of claim 10 , wherein the body width w is between 2 and 6 mm.

20. The memory system of claim 10 , wherein the thermally conductive body comprises copper, aluminum, a combination thereof, or an alloy thereof.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 14, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051028/0835 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050719/0550 →
SUPPLEMENT NO. 1 TO PATENT SECURITY AGREEMENT Recorded Nov 13, 2018
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A.., AS COLLATERAL AGENT
Reel/Frame 047630/0756 →
SUPPLEMENT NO. 10 TO PATENT SECURITY AGREEMENT Recorded Nov 13, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048102/0420 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 12, 2018
From: QU, XIAOPENG
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046857/0795 →
Continuity (1)
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