Firmware debug trace capture
A method for firmware debug trace capture includes creating a hand-off block (“HOB”), capturing first debug trace statements during a boot sequence of a computer and writing the first debug trace statements to the HOB. A trace memory buffer can be created and the first debug trace statements can be copied from the HOB to the trace memory buffer. Second debug trace statements are captured during the boot sequence and appended to the trace memory buffer. In some configurations, the first debug trace statements can be written to the HOB during the pre-Extensible Firmware Interface initialization (“PEI”) phase of the boot sequence and the second debug trace statements can be written to the trace memory buffer during the driver execution (“DXE”) phase of the boot sequence.
1. A computer-implemented method comprising:
capturing a first debug trace statement during a boot sequence of a computer;
writing the first debug trace statement to a first memory location during a pre-extensible firmware interface initialization (PEI) phase of the boot sequence of the computer;
copying the first trace statement from the first memory location to a second memory location;
capturing a second debug trace statement during the boot sequence of the computer;
writing the second debug trace statement to the second memory location; and
copying the first debug trace statement and the second debug trace statement from the second memory location to a file.
2. The computer-implemented method of claim 1 , wherein the first memory location is associated with a processor cache of the computer.
3. The computer-implemented method of claim 1 , wherein the first memory location is associated with a hand-off block (“HOB”).
4. The computer-implemented method of claim 1 , wherein the second debug trace statement is written to the second memory location during a driver execution environment (“DXE”) phase of the boot sequence of the computer.
5. The computer-implemented method of claim 1 , further comprising:
capturing a third debug trace statement during the boot sequence of the computer; and
appending the third debug trace statement to the file.
6. The computer-implemented method of claim 5 , wherein the third debug trace statement is appended to the file during a boot device selection (“BDS”) phase of the boot sequence of the computer.
7. A non-transitory computer-readable storage medium having computer-executable instructions stored thereupon which, when executed by a computer, cause the computer to perform operations comprising:
capturing a first debug trace statement during a boot sequence of the computer;
writing the first debug trace statement to a first memory location during a pre-extensible firmware interface initialization (PEI) phase the boot sequence of the computer;
copying the first trace statement from the first memory location to a second memory location;
capturing a second debug trace statement during the boot sequence of the computer;
writing the second debug trace statement to the second memory location; and
copying the first debug trace statement and the second debug trace statement from the second memory location to a file.
8. The non-transitory computer-readable storage medium of claim 7 , wherein the first memory location is associated with a hand-off block (“HOB”) created in a processor cache of the computer.
9. The non-transitory computer-readable storage medium of claim 7 , wherein the second debug trace statement is written to the second memory location during a driver execution environment (“DXE”) phase of the boot sequence of the computer.
10. The non-transitory computer-readable storage medium of claim 7 , wherein the operations further comprise:
capturing a third debug trace statement during the boot sequence of the computer; and
appending the third debug trace statement to the file.
11. The non-transitory computer-readable storage medium of claim 10 , wherein the third debug trace statement is appended to the file during a boot device selection (“BDS”) phase of the boot sequence of the computer.
12. A computing device, comprising:
a processor; and
a memory having computer-executable instructions stored thereupon which, when executed by the processor, cause the processor to perform operations comprising
capturing a first debug trace statement during a boot sequence of the computing device,
writing the first debug trace statement to a first memory location during a pre-extensible firmware interface initialization (“PEI”) phase of the boot sequence of the computing device,
copying the first trace statement from the first memory location to a second memory location;
capturing a second debug trace statement during the boot sequence of the computing device,
writing the second debug trace statement to the second memory location; and
copying the first debug trace statement and the second debug trace statement from the second memory location to a file.
13. The computing device of claim 12 , wherein the first memory location is associated with a hand-off block (“HOB”) created in a processor cache of the computing device.
14. The computing device of claim 12 , wherein the second debug trace statement is written to the second memory location during a driver execution environment (“DXE”) phase of the boot sequence of the computing device.
15. The computing device of claim 12 , wherein the operations further comprise:
capturing a third debug trace statement during the boot sequence of the computing device; and
appending the third debug trace statement to the file.
16. The computing device of claim 15 , wherein the third debug trace statement is appended to the file during a boot device selection (“BDS”) phase of the boot sequence of the computing device.
17. The computing device of claim 12 , wherein the operations further comprise copying the file to an external data storage.
18. The method of claim 1 , further comprising copying the file to an external data storage.
19. The non-transitory computer-readable storage medium of claim 7 , wherein the operations further comprise copying the file to an external data storage.