Electronic device with a sense amp mechanism
An electronic device includes: a memory cell configured to store electric charge for representing a data value, wherein the memory cell is configured to store two or more levels of the electric charge corresponding to different data values; a preamplifier operably coupled to the memory cell, the preamplifier having a common source and configured to generate an amplified signal based on amplifying a difference in the two or more levels of the stored electric charge; and a sense amplifier operably coupled to the preamplifier, the sense amplifier configured to further process the amplified signal for determining the data value stored in the memory cell.
1. An electronic device, comprising:
a memory cell configured to store two or more levels of electric charge corresponding to two or more different data values;
a preamplifier operably coupled to the memory cell, the preamplifier having a common source and configured to generate an amplified signal based on amplifying a difference in the two or more levels of the stored electric charge; and
a sense amplifier operably coupled to the preamplifier, the sense amplifier configured to further process the amplified signal for determining the data value stored in the memory cell.
2. The electronic device of claim 1 , further comprising a signal control circuit including one or more N-channel devices and configured to initially precharge a sense amp output to electrical ground.
3. The electronic device of claim 1 , further comprising a signal control circuit including one or more P-channel devices and is configured to initially precharge a sense amp output to a predetermined level higher than electrical ground.
4. The electronic device of claim 1 , wherein the sense amplifier includes one or more dedicated-reference portions configured to receive a dedicated reference digit, wherein the sense amplifier is configured to amplify the difference based on the dedicated reference digit.
5. The electronic device of claim 4 , wherein the dedicated reference digit is initially precharged to a predetermined level.
6. The electronic device of claim 5 , wherein the predetermined level corresponds to a system voltage (V cc ).
7. The electronic device of claim 5 , wherein the preamplifier is configured to adjust the dedicated reference digit to either a maximum level when the data value corresponds to “1” or a minimum level when the data value corresponds to “0”.
8. The electronic device of claim 5 , wherein the preamplifier is configured to generate the dedicated reference digit based on adjusting the dedicated reference digit to either a voltage level at or near electrical ground or a different voltage level higher than the stored electric charge.
9. The electronic device of claim 5 , wherein the preamplifier includes a common source controller configured to adjust the dedicated reference digit according to the stored electric charge.
10. The electronic device of claim 9 , wherein the common source controller is configured to either couple the dedicated reference digit to an electrical ground when the data value corresponds to “1” or maintain the predetermined level when the data value corresponds to “0”.
11. The electronic device of claim 9 , wherein the common source controller is configured to operate based on a preamp control signal.
12. The electronic device of claim 11 , wherein the preamp control signal is at a level lower than electrical ground when the sense amplifier further processes the amplified output for improving signal levels and/or signal speed, wherein the sense amplifier is configured to further increase the amplified output based on the preamp control signal, the dedicated reference digit, or a combination thereof.
13. The electronic device of claim 1 , wherein the sense amplifier is further configured to recharge the memory cell to restore electrical charge depleted during the further processing, wherein the further processing corresponds to a read.
14. The electronic device of claim 13 , wherein the sense amplifier is configured to:
restore the electrical charges based on reversing a polarity of the charges;
set a tracking bit that is associated with the memory cell, wherein the tracking bit represents the polarity.
15. The electronic device of claim 1 , wherein the electronic device is a dynamic random-access memory (DRAM) device.
16. A method of operating an electronic device, the method comprising:
accessing an amount of electric charge stored at a memory cell, wherein the amount of electric charge represents a data value;
using a preamplifier, generating an amplified signal for a sense amplifier based on initially amplifying the amount of electric charge; and
processing the amplified signal with a sense amplifier for determining the data value.
17. The method of claim 16 , wherein generating the amplified signal includes using a dedicated reference digit as a voltage reference in initially amplifying the amount of electric charge.
18. The method of claim 17 , wherein generating the amplified signal includes initially precharging the dedicated reference digit to a predetermined level and then adjusting the dedicated reference digit according to the amount of electric charge.
19. The method of claim 18 , wherein adjusting the reference digit includes adjusting the dedicated reference digit from the predetermined level to either a voltage level at or near electrical ground or a different voltage level higher than the stored electric charge.
20. The method of claim 19 , wherein:
precharging the dedicated reference digit includes precharging the dedicated reference to a system voltage (V cc );
adjusting the dedicated reference digit includes adjusting the dedicated reference digit to either a maximum level when the data value corresponds to “1” or a minimum level when the data value corresponds to “0;” and
further comprising:
initially precharging the amplified signal to electrical ground.