IP Library Granted Patent US 10,573,812
Granted Patent B2
US 10,573,812 · App. 16/127,984 · Granted Feb 25, 2020

Buried low-resistance metal word lines for cross-point variable-resistance material memories

Inventors: Jun Liu (Boise, ID); Michael P. Violette (Boise, ID)
Assignee: Micron Technology, Inc.
H01L45/1608G11C13/0004H01L27/101H01L27/24H01L27/2409H01L45/04H01L45/06H01L45/1233H01L45/1253H01L45/142H01L45/143H01L45/144G11C2213/72
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Quick Facts
Patent No.
US 10,573,812
App. No.
16/127,984
Granted
Feb 25, 2020
Kind
B2
Abstract

Variable-resistance material memories include a buried salicide word line disposed below a diode. Variable-resistance material memories include a metal spacer spaced apart and next to the diode. Processes include the formation of one of the buried salicide word line and the metal spacer. Devices include the variable-resistance material memories and one of the buried salicided word line and the spacer word line.

Claims (22)

1. A process of forming a memory structure, comprising:

forming a first recess in a semiconductive substrate by use of a hard mask to define a pillar formed at least in part of a material of the semiconductive substrate;

depositing a metal material within the first recess, and establishing conditions to form a silicide within the material of the semiconductive substrate surrounding the first recess;

patterning the silicide to define a word line extending through the pillar;

forming a second recess in the hard mask, the second recess exposing an upper surface of the pillar;

forming a diode in the second recess; and

forming a variable-resistance material coupled to the diode.

2. The process of claim 1 , wherein the metal material is heated to form the word line extending through the pillar.

3. The process of claim 1 , wherein forming the diode in the second recess in the hard mask comprises:

etching the hard mask to form the second recess in the hard mask;

forming an epitaxial first film on the upper surface of the pillar; and

forming an epitaxial second film on the epitaxial first film.

4. The process of claim 3 , wherein forming the variable-resistance material comprises siliciding a portion of the epitaxial second film to form a silicide contact.

5. The process of claim 4 , wherein forming the variable-resistance material further comprises forming a bottom electrode on the silicide contact.

6. The process of claim 5 , wherein forming the variable-resistance material further comprises forming the variable-resistance material on the bottom electrode.

7. The process of claim 6 , wherein forming the variable-resistance erial further comprises forming a top electrode on the variable-resistance material.

8. The process of claim 7 , further comprising forming a bit line above the variable-resistance material and coupled to the variable-resistance material via the top electrode.

9. The process of claim 1 , wherein the word line includes cobalt silicide.

10. The process of claim 1 , wherein the variable-resistance material is selected from an alloy, a quasi-metal composition, a metal oxide, and a chalcogenide.

11. The process of claim 1 wherein the variable-resistance material includes a phase-change material.

12. The process of claim 1 , wherein the variable-resistance material includes one or more of a gallium-containing material, a germanium-containing material, an indium-containing material, an antimony-containing material, a tellurium-containing material, a selenium-containing material, an arsenic-containing material, an aluminum-containing material, a tin-containing material, a palladium-containing material, a silver-containing material, or a colossal magneto-resistive film.

13. The process of claim 1 , wherein the variable-resistance material includes a doped chalcogenide glass of the general formula A x B y , B selected from sulfur, selenium, and tellurium, and mixtures thereof, and A includes at least one element from Group III-A, Group IV-A, Group V-A, or Group VII-A of the periodic table.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 14, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051028/0835 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050719/0550 →
SUPPLEMENT NO. 1 TO PATENT SECURITY AGREEMENT Recorded Nov 13, 2018
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A.., AS COLLATERAL AGENT
Reel/Frame 047630/0756 →
SUPPLEMENT NO. 10 TO PATENT SECURITY AGREEMENT Recorded Nov 13, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048102/0420 →