IP Library Granted Patent US 10,756,104
Granted Patent B2
US 10,756,104 · App. 16/129,082 · Granted Aug 25, 2020

Semiconductor memory device and method for manufacturing same

Inventors: Jun Fujiki (Mie, JP); Shinya Arai (Yokkaichi, JP); Kotaro Fujii (Yokkaichi, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L27/11582H01L21/76897H01L27/0727H01L27/1157H01L27/11573
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,756,104
App. No.
16/129,082
Granted
Aug 25, 2020
Kind
B2
Abstract

A semiconductor memory device includes a semiconductor substrate including a diode formed in an upper layer portion of the semiconductor substrate, a first insulating film provided above the semiconductor substrate, a first conductive film provided above the first insulating film and coupled to the diode, a stacked body provided above the first conductive film, an insulator and an electrode film being stacked alternately in the stacked body, a semiconductor member piercing the stacked body and being connected to the first conductive film, and a charge storage member provided between the electrode film and the semiconductor member.

Claims (83)

1. A semiconductor memory device, comprising:

a semiconductor substrate including a diode formed in an upper layer portion of the semiconductor substrate;

a first insulating film provided above the semiconductor substrate;

a first conductive film provided above the first insulating film and coupled to the diode;

a stacked body provided above the first conductive film, an insulator and an electrode film being stacked alternately in the stacked body;

a semiconductor member piercing the stacked body and being connected to the first conductive film; and

a charge storage member provided between the electrode film and the semiconductor member.

2. The device according to claim 1 , wherein

the semiconductor substrate includes:

a first semiconductor layer of a first conductivity type;

a second semiconductor layer formed in a portion of an upper layer portion of the first semiconductor layer, the second semiconductor layer being of a second conductivity type; and

a third semiconductor layer formed in a portion of an upper layer portion of the second semiconductor layer, the third semiconductor layer being of the first conductivity type, and

the first conductive film is coupled to the third semiconductor layer.

3. The device according to claim 2 , wherein

the semiconductor substrate is of the second conductivity type, and

the first semiconductor layer is formed in a portion of the upper layer portion of the semiconductor substrate.

4. The device according to claim 1 , further comprising a first plug coupled between the diode and the first conductive film,

the first conductive film including

a first portion connected to the semiconductor member, and

a second portion connected to the first plug and insulated from the first portion.

5. The device according to claim 4 , wherein

the second portion is provided at a periphery of the first portion.

6. The device according to claim 4 , further comprising:

a second insulating film provided at a periphery of the stacked body; and

an insulating plate provided inside the second insulating film and between the first portion and the second portion.

7. The device according to claim 4 , further comprising:

a first interconnect provided in the first insulating film and coupled between the first plug and the diode.

8. The device according to claim 7 , further comprising:

a second interconnect provided in the first insulating film and coupled to a transistor formed on the semiconductor substrate, the first interconnect being insulated from the second interconnect.

9. The device according to claim 8 , further comprising:

a through-via piercing the stacked body and the first conductive film, and coupled to the second interconnect.

10. The device according to claim 1 , further comprising:

a second conductive film provided between the first conductive film and the stacked body;

an intermediate insulating film provided between the first conductive film and the second conductive film;

a first plug coupled between the diode and the first conductive film; and

a second plug coupled between the first conductive film and the second conductive film.

11. The device according to claim 10 , wherein

the second conductive film includes a first portion surrounding the semiconductor member, and a second portion connected to the second plug and insulated from the first portion.

12. The device according to claim 11 , wherein

the second portion is provided at a periphery of the first portion.

13. The device according to claim 11 , further comprising:

a second insulating film provided at a periphery of the stacked body; and

an insulating plate provided inside the second insulating film and between the first portion and the second portion.

14. The device according to claim 10 , further comprising:

a first interconnect provided in the first insulating film and coupled between the first plug and the diode.

15. The device according to claim 14 , further comprising:

a second interconnect provided in the first insulating film and coupled to a transistor formed on the semiconductor substrate; and

a through-via piercing the stacked body and the first and second conductive films, and coupled to the second interconnect.

16. A method for manufacturing a semiconductor memory device, comprising:

forming a diode in an upper layer portion of a semiconductor substrate;

forming a first insulating film above the semiconductor substrate;

forming a first conductive film above the first insulating film, the first conductive film being coupled to the diode;

forming a stacked body above the first conductive film by alternately forming a first insulating material film and a second insulating material film;

forming a hole in the stacked body to reach the first conductive film by performing reactive ion etching;

forming a charge storage member inside the hole;

forming a semiconductor member inside the hole where the charge storage member is formed, the semiconductor member being connected to the first conductive film; and

replacing the second insulating material film with an electrode film after the forming of the semiconductor member.

17. The method according to claim 16 , wherein

the forming of the first insulating film includes forming a plug inside the first insulating film, the plug being coupled between the diode and the first conductive film, and

the method further comprises subdividing the first conductive film into a first portion and a second portion after the forming of the hole, the first portion being connected to the semiconductor member, the second portion being connected to the plug.

18. The method according to claim 16 , wherein

the forming of the diode includes

forming a first semiconductor layer of a first conductivity type in a portion of the upper layer portion of the semiconductor substrate,

forming a second semiconductor layer of a second conductivity type in a portion of an upper layer portion of the first semiconductor layer, and

forming a third semiconductor layer of the first conductivity type in a portion of an upper layer portion of the second semiconductor layer, the first conductive film being coupled to the third semiconductor layer.

19. A method for manufacturing a semiconductor memory device, comprising:

forming a diode in an upper layer portion of a semiconductor substrate;

forming a first insulating film above the semiconductor substrate;

forming a first conductive film above the first insulating film, the first conductive film being coupled to the diode;

forming an intermediate insulating film above the first conductive film;

forming a plug piercing the intermediate insulating film;

forming a second conductive film above the intermediate insulating film, the second conductive film being coupled to the first conductive film via the plug;

forming a stacked body above the second conductive film by alternately forming a first insulating material film and a second insulating material film;

forming a hole in the stacked body, the second conductive film, and the second insulating film to reach the first conductive film by performing reactive ion etching;

forming a charge storage member inside the hole;

forming a semiconductor member inside the hole where the charge storage member is formed, the semiconductor member being connected to the first conductive film;

subdividing the second conductive film into a first portion and a second portion after the forming of the hole, the first portion surrounding the semiconductor member, the second portion being connected to the plug; and

replacing the second insulating material film with an electrode film after the forming of the semiconductor member.

20. The method according to claim 19 , wherein

the forming of the diode includes

forming a first semiconductor layer of a first conductivity type in a portion of the upper layer portion of the semiconductor substrate,

forming a second semiconductor layer of a second conductivity type in a portion of an upper layer portion of the first semiconductor layer, and

forming a third semiconductor layer of the first conductivity type in a portion of an upper layer portion of the second semiconductor layer, the first conductive film being coupled to the third semiconductor layer.

Assignments (2)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2018
From: FUJIKI, JUN; ARAI, SHINYA; FUJII, KOTARO
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 047386/0579 →
Priority Claims (1)
JP 2017-247987 · Dec 25, 2017 · national
Continuity (1)
Related Publication 20190198524A1 · Jun 27, 2019