IP Library Granted Patent US 10,629,269
Granted Patent B2
US 10,629,269 · App. 16/135,159 · Granted Apr 21, 2020

Solid state storage device and read table management method thereof

Inventors: Shih-Jia Zeng (Taipei, TW); Chun-Wei Kuo (Taipei, TW); Kuan-Chun Chen (Taipei, TW); Jen-Chien Fu (Taipei, TW)
Assignee: SOLID STATE STORAGE TECHNOLOGY CORPORATION
G11C16/26G06F12/0284G11C16/0441G11C2216/12
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Quick Facts
Patent No.
US 10,629,269
App. No.
16/135,159
Granted
Apr 21, 2020
Kind
B2
Abstract

A read table management method for a solid state storage device includes the following steps. If the lowest computation value in a hot group is lower than the highest computation value in a cold group when a read table adjusting process is enabled, a first read voltage set corresponding to the lowest computation value in the hot group and a second read voltage set corresponding to the highest computation value in the cold group are swapped with each other. Consequently, the second read voltage set becomes to belong to the hot group, and the first read voltage set becomes to belong to the cold group.

Claims (23)

1. A solid state storage device, comprising:

a control circuit comprising a read table, wherein plural read voltage sets and corresponding computation values are stored in the read table, first portions of the plural read voltage sets belong to a hot group, and second portions of the plural read voltage sets belong to a cold group; and

a non-volatile memory,

wherein during a read cycle, the control circuit determines a selected read voltage set from the plural read voltage sets according to a specified sequence in the read table, and provides the selected read voltage set to the non-volatile memory,

wherein if a decoding operation is successful, the computation value corresponding to the selected read voltage set is modified, wherein if the decoding operation is not successful, the control circuit determines a next selected read voltage set from the plural read voltage sets according to the specified sequence, and provides the next selected read voltage set to the non-volatile memory,

wherein the control circuit enables a read table adjusting process when the number of times the read cycle is performed reaches a specified value or after the solid state storage device has been operated for a specified time period;

wherein if the lowest computation value in the hot group is lower than the highest computation value in the cold group when the read table adjusting process is enabled, a first read voltage set corresponding to the lowest computation value in the hot group and a second read voltage set corresponding to the highest computation value in the cold group are swapped with each other by the control circuit, and the second read voltage set becomes to belong to the hot group, and the first read voltage set becomes to belong to the cold group.

2. The solid state storage device as claimed in claim 1 , wherein according to the specified sequence, the read voltage sets belonging to the hot group have a higher priority to be provided to the non-volatile memory than the read voltage sets belonging to the cold group.

3. The solid state storage device as claimed in claim 1 , wherein, in the hot group, the read voltage set having the highest priority to be provided to the non-volatile memory is set as a default read voltage set, wherein the default read voltage set is provided to the non-volatile memory before a read retry operation.

4. The solid state storage device as claimed in claim 1 , wherein the computation value is an accumulative count, wherein if the decoding operation is successful, the accumulative count corresponding to the selected read voltage set is added by 1.

5. The solid state storage device as claimed in claim 1 , wherein the computation value is a probability value indicating a successful decoding probability of the selected read voltage set.

6. The solid state storage device as claimed in claim 1 , wherein before the first read voltage set and the second read voltage set are swapped, the first read voltage set corresponds to an x-th order in the read table, and the second read voltage set corresponds to a y-th order in the read table, wherein after the first read voltage set and the second read voltage set are swapped, the second read voltage set corresponds to the x-th order in the read table, and the first read voltage set corresponds to the y-th order in the read table.

7. A read table management method for a solid state storage device, the solid state storage device comprising a control circuit and a non-volatile memory, the control circuit comprising a read table, plural read voltage sets and corresponding computation values being stored in the read table, first portions of the plural read voltage sets belonging to a hot group, second portions of the plural read voltage sets belonging to a cold group, the read table management method comprising steps of:

during a read cycle, determining a selected read voltage set from the plural read voltage sets according to a specified sequence in the read table, and providing the selected read voltage set to the non-volatile memory;

if a decoding operation is successful, modifying the computation value corresponding to the selected read voltage set;

if the decoding operation is not successful, determining a next selected read voltage set from the plural read voltage sets according to the specified sequence, and providing the next selected read voltage set to the non-volatile memory;

enabling a read table adjusting process when the number of times the read cycle is performed reaches a specified value or after the solid state storage device has been operated for a specified time period; and

if the lowest computation value in the hot group is lower than the highest computation value in the cold group when the read table adjusting process is enabled, allowing a first read voltage set corresponding to the lowest computation value in the hot group and a second read voltage set corresponding to the highest computation value in the cold group to be swapped with each other, and the second read voltage set becomes to belong to the hot group, and the first read voltage set becomes to belong to the cold group.

8. The read table management method as claimed in claim 7 , wherein according to the specified sequence, the read voltage sets belonging to the hot group have a higher priority to be provided to the non-volatile memory than the read voltage sets belonging to the cold group.

9. The read table management method as claimed in claim 7 , wherein, in the hot group, the read voltage set having the highest priority to be provided to the non-volatile memory is set as a default read voltage set, wherein the default read voltage set is provided to the non-volatile memory before a read retry operation.

10. The read table management method as claimed in claim 7 , wherein the computation value is an accumulative count, wherein if the decoding operation is successful, the accumulative count corresponding to the selected read voltage set is added by 1.

11. The read table management method as claimed in claim 7 , wherein the computation value is a probability value indicating a successful decoding probability of the selected read voltage set.

12. The read table management method as claimed in claim 7 , wherein before the first read voltage set and the second read voltage set are swapped, the first read voltage set corresponds to an x-th order in the read table, and the second read voltage set corresponds to a y-th order in the read table, wherein after the first read voltage set and the second read voltage set are swapped, the second read voltage set corresponds to the x-th order in the read table, and the first read voltage set corresponds to the y-th order in the read table.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2019
From: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED; LITE-ON TECHNOLOGY CORPORATION
To: SOLID STATE STORAGE TECHNOLOGY CORPORATION
Reel/Frame 051213/0824 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2018
From: ZENG, SHIH-JIA; KUO, CHUN-WEI; CHEN, KUAN-CHUN; FU, JEN-CHIEN
To: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED; LITE-ON TECHNOLOGY CORPORATION
Reel/Frame 046908/0437 →
Priority Claims (1)
CN 2018 1 0828225 · Jul 25, 2018 · national
Continuity (1)
Related Publication 20200035307A1 · Jan 30, 2020