IP Library Granted Patent US 10,473,699
Granted Patent B1
US 10,473,699 · App. 16/140,168 · Granted Nov 12, 2019

Systems and methods for controlling MOSFETs

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Quick Facts
Patent No.
US 10,473,699
App. No.
16/140,168
Granted
Nov 12, 2019
Kind
B1
Abstract

An electronic device is described. The electronic device includes line voltage measuring circuitry configured to measure a line voltage to produce a line voltage measurement. The electronic device also includes load voltage measuring circuitry configured to measure a load voltage to produce a load voltage measurement. The electronic device further includes a processor coupled to the line voltage measuring circuitry and the load voltage measuring circuitry. The processor is configured to adjust a voltage ramp waveform for a transition of a first metal-oxide-semiconductor field-effect transistor (MOSFET) and a second MOSFET based on the line voltage measurement and the load voltage measurement to minimize heat generation and electromagnetic interference creation by the MOSFETs. The first MOSFET and the second MOSFET control a current to a load in an alternating current configuration.

Claims (27)

1. An electronic device, comprising:

line voltage measuring circuitry configured to measure a line voltage to produce a line voltage measurement;

load voltage measuring circuitry configured to measure a load voltage to produce a load voltage measurement; and

a processor coupled to the line voltage measuring circuitry and the load voltage measuring circuitry, wherein the processor is configured to adjust a voltage ramp waveform for a transition of a first metal-oxide-semiconductor field-effect transistor (MOSFET) and a second MOSFET based on the line voltage measurement and the load voltage measurement to minimize heat generation and electromagnetic interference creation by the MOSFETs, wherein the first MOSFET and the second MOSFET control a current to a load in an alternating current configuration, wherein the processor adjusts the voltage ramp waveform based on a difference between the line voltage measurement and the load voltage measurement.

2. The electronic device of claim 1 , wherein the processor provides the voltage ramp waveform to an amplification and filtering block coupled to a gate input of the first MOSFET and a gate input of the second MOSFET.

3. The electronic device of claim 1 , wherein the processor adjusts the voltage ramp waveform in real time based on the line voltage measurement and the load voltage measurement.

4. The electronic device of claim 1 , wherein the processor adjusts the voltage ramp waveform to round final stages of an off/on transition or an on/off transition of the MOSFETs.

5. The electronic device of claim 4 , wherein the voltage ramp waveform comprises a fast transition during initial stages of an off/on transition to minimize heat generation by the MOSFETs and a rounded transition in the final stages of the off/on transition to reduce electromagnetic interference.

6. The electronic device of claim 1 , wherein the processor adjusts the voltage ramp waveform using the equation log(time) X , where X is based on a size of the load.

7. The electronic device of claim 6 , wherein X varies between 0.1 and 1.

8. The electronic device of claim 6 , wherein the voltage ramp waveform comprises a duration between 100 microseconds and 1000 microseconds.

9. The electronic device of claim 6 , wherein a voltage scale of the voltage ramp waveform is based on a size of the load.

10. The electronic device of claim 1 , wherein the processor adjusts the voltage ramp waveform lower when the load voltage measurement develops a sharp edge at the beginning of the voltage ramp waveform.

11. The electronic device of claim 1 , wherein the processor adjusts the voltage ramp waveform higher when the load voltage measurement develops a notch at the end of the voltage ramp waveform.

12. The electronic device of claim 1 , wherein the processor adjusts a starting voltage of the voltage ramp waveform until a difference between the line voltage measurement and the load voltage measurement is within a threshold at a number of points during the transition of the MOSFETs.

13. A method, comprising:

measuring a line voltage to produce a line voltage measurement;

measuring a load voltage to produce a load voltage measurement; and

adjusting a voltage ramp waveform for a transition of a first metal-oxide-semiconductor field-effect transistor (MOSFET) and a second MOSFET based on the line voltage measurement and the load voltage measurement to minimize heat generation and electromagnetic interference creation by the MOSFETs, wherein the first MOSFET and the second MOSFET control a current to a load in an alternating current configuration, wherein the voltage ramp waveform is adjusted lower when the load voltage measurement develops a sharp edge at the beginning of the voltage ramp waveform.

14. The method of claim 13 , wherein the voltage ramp waveform is adjusted to round final stages of an off/on transition or an on/off transition of the MOSFETs.

15. The method of claim 13 , wherein the voltage ramp waveform is adjusted using the equation log(time) X , where X is based on a size of the load.

16. The method of claim 13 , wherein the voltage ramp waveform is adjusted higher when the load voltage measurement develops a notch at the end of the voltage ramp waveform.

17. The method of claim 13 , wherein the voltage ramp waveform is adjusted based on a difference between the line voltage measurement and the load voltage measurement at a number of points during the transition of the MOSFETs.

18. A non-transitory computer-readable medium, the computer-readable medium comprising executable instructions for:

measuring a line voltage to produce a line voltage measurement;

measuring a load voltage to produce a load voltage measurement; and

adjusting a voltage ramp waveform for a transition of a first metal-oxide-semiconductor field-effect transistor (MOSFET) and a second MOSFET based on the line voltage measurement and the load voltage measurement to minimize heat generation and electromagnetic interference creation by the MOSFETs, wherein the first MOSFET and the second MOSFET control a current to a load in an alternating current configuration, wherein the voltage ramp waveform is adjusted higher when the load voltage measurement develops a notch at the end of the voltage ramp waveform.

Assignments (6)
SECURITY INTEREST Recorded Jul 18, 2024
From: SNAP ONE, LLC
To: JPMORGAN CHASE BANK, N.A. AS ADMINISTRATIVE AGENT
Reel/Frame 068426/0446 →
SECURITY RELEASE R/F 058439/0014 Recorded Jun 17, 2024
From: MORGAN STANLEY SENIOR FUNDING, INC., AS AGENT
To: SNAP ONE, LLC
Reel/Frame 067768/0139 →
SECURITY INTEREST Recorded Dec 9, 2021
From: SNAP ONE, LLC
To: MORGAN STANLEY SENIOR FUNDING INC.
Reel/Frame 058439/0014 →
CHANGE OF NAME Recorded Aug 25, 2021
From: WIREPATH HOME SYSTEMS, LLC
To: SNAP ONE, LLC
Reel/Frame 057298/0014 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2019
From: CONTROL4 CORPORATION
To: WIREPATH HOME SYSTEMS, LLC
Reel/Frame 051446/0868 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2019
From: SMITH, GREGORY SCOTT; KING, SIDNEY LYLE; BRUHN, ROBERT DON, JR.
To: CONTROL4 CORPORATION
Reel/Frame 048859/0748 →