Device and method for testing computer system

1. A computer system, comprising:

a circuit board;

one or more connectors/sockets disposed on the circuit board;

one or more components disposed in the corresponding connectors/sockets;

a first controller that is on the circuit board and configured to, before booting up the computer system to run an operating system (OS):

receive information corresponding to parameters of the components and the circuit board and/or the connectors/sockets;

determine whether the first controller is connected to a server; and

determine, in response to a determination that the first controller is not connected to a server, whether an input signal is provided to the computer system within a predetermined amount of time; and

a complex programmable logic device (CPLD) that is on the circuit board and configured to, before booting up the computer system to run the OS:

provide a first signal to enable at least some of the components;

receive information corresponding to a sequence of voltages applied to the enabled components; and

transmit the received information to the first controller;

wherein the first controller is a baseboard management controller (BMC) and includes a first analog-to-digital converter (ADC) configured to receive information corresponding to voltages applied to a first set of components; and

wherein the CPLD includes a second ADC configured to receive information corresponding to voltages applied to a second set of components, wherein the second ADC is capable of receiving more voltage levels than the first ADC.

2. The computer system of claim 1 , wherein the parameters include a temperature of the components in the computer system, a speed of rotational components in the computer system, alternating current/direct current (AC/DC) voltages or power status of the components in the computer system, OS status, timing and/or digital input signals.

3. The computer system of claim 1 , further comprising a plurality of controllers connected to the first controller and the components, wherein the controllers are configured to detect information corresponding to parameters of the components, the circuit board and/or the connectors/sockets, and to transmit detected information to the first controller.

4. The computer system of claim 1 , wherein the first controller is configured to transmit the received information to a management server.

5. The computer system of claim 1 , wherein the first controller is configured to receive the information at a u-boot stage.

6. The computer system of claim 1 , wherein the sequence of applied voltages is checked or monitored.

7. The computer system of claim 6 , wherein timing intervals of the applied voltages are calculated combined with power rails.

8. The computer system of claim 6 , wherein the sequence for applying the voltages to the enabled components is determined based on the first signal provided by the CPLD.

9. The computer system of claim 6 , wherein the CPLD is configured to, before booting up the computer system to run the OS: receive signals indicating whether the voltages have been applied successfully and/or a timing of the applied voltages.

10. The computer system of claim 1 , wherein the CPLD is configured to transmit information corresponding to the voltages received by the second ADC to the first controller.

11. The computer system of claim 1 , wherein the CPLD is configured to receive information corresponding to voltages applied to the second set of components in response to a number of voltages to be received by the first ADC reaches a maximum number.

12. The computer system of claim 1 , wherein the first controller is further configured to:

enter, in response to a determination that an input signal is provided to the computer system within a predetermined amount of time, the computer system into a debug mode; and

load, in response to a determination that an input signal is not provided to the computer system within a predetermined amount of time, the OS.

13. A computer system, comprising:

a circuit board;

one or more components disposed on the circuit board;

a first controller that is on the circuit board and configured to, before booting up the computer system to run an operating system (OS):

receive information corresponding to parameters of the circuit board and/or the components;

determine whether the first controller is connected to a server; and

determine, in response to a determination that the first controller is not connected to a server, whether an input signal is provided to the computer system within a predetermined amount of time; and

a complex programmable logic device (CPLD) that is on the circuit board and configured to, before booting up the computer system to run the OS:

provide a first signal to enable at least some of the components;

receive information corresponding to a sequence of voltages applied to the enabled components; and

transmit the received information to the first controller;

wherein the first controller is a baseboard management controller (BMC) and includes a first analog-to-digital converter (ADC) configured to receive information corresponding to voltages applied to a first set of components; and

wherein the CPLD includes a second ADC configured to receive information corresponding to voltages applied to a second set of components, wherein the second ADC is capable of receiving more voltage levels than the first ADC.

14. The computer system of claim 13 , wherein the parameters include a temperature of the components in the computer system, a speed of components in the computer system, alternating current/direct current (AC/DC) voltages or power status of the components in the computer system, OS status, timing and/or digital input signals.

15. The computer system of claim 13 , further comprising a plurality of controllers connected to the first controller and the components, wherein the controllers are configured to detect information corresponding to parameters of the components, the circuit board and/or connectors/sockets, and to transmit detected information to the first controller.

16. The computer system of claim 13 , wherein the first controller is configured to transmit the received information to a management server.

17. The computer system of claim 13 , wherein the first controller is configured to receive the information at a u-boot stage.

18. The computer system of claim 13 , wherein the first controller is further configured to:

enter, in response to a determination that an input signal is provided to the computer system within a predetermined amount of time, the computer system into a debug mode; and

load, in response to a determination that an input signal is not provided to the computer system within a predetermined amount of time, the OS.

19. A method for testing a computer system that comprises components, the method comprising:

(a) providing a direct current (DC) power to turn on the computer system;

(b) providing a first signal to enable at least some of the components of the computer system;

(c) receiving information corresponding to a sequence of voltages applied to the enabled components before booting up the computer system to run an operating system (OS), wherein the information is collected by a baseboard management controller (BMC) and a complex programmable logic device (CPLD) separate from each other;

(d) determining whether the BMC is connected to a server; and

(e) determining, in response to a determination that the BMC is not connected to a server, whether an input signal is provided to the computer system within a predetermined amount of time;

wherein the BMC includes a first analog-to-digital converter (ADC) configured to receive information corresponding to voltages applied to a first set of components; and

wherein the CPLD includes a second ADC configured to receive information corresponding to voltages applied to a second set of components, wherein the second ADC is capable of receiving more voltage levels than the first ADC.

20. The method of claim 19 , further comprising detecting parameters of the components of the computer system, wherein the parameters include a temperature of the components in the computer system, a speed of the components in the computer system, alternating current/direct current (AC/DC) voltages or power status of the components in the computer system, OS status, timing and/or digital input signals.

21. The method of claim 19 , further comprising transmitting the collected information to a management server.

22. The method of claim 19 , further comprising:

entering, in response to a determination that an input signal is provided to the computer system within a predetermined amount of time, the computer system into a debug mode; and

loading, in response to a determination that an input signal is not provided to the computer system within a predetermined amount of time, the OS.