IP Library Granted Patent US 10,826,447
Granted Patent B2
US 10,826,447 · App. 16/157,836 · Granted Nov 3, 2020

Adaptive envelope tracking threshold

Inventors: Andrea Camuffo (Munich, DE); Sandro Pinarello (Munich, DE)
Assignee: Intel IP Corporation
H03F3/24H03F1/02H03F1/32H04B1/04H04L27/04H04W52/02H03F2200/102H03F2200/451H03F2201/3215
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Quick Facts
Patent No.
US 10,826,447
App. No.
16/157,836
Granted
Nov 3, 2020
Kind
B2
Abstract

An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV<an envelope tracking (ET) threshold (ETT), then the processor configures the PA to transmit a signal in an average power tracking (APT) mode that maintains the SV at the SVV during the TS. When the SV≥ETT, and an APT condition is met, then the processor configures the PA to transmit the signal in the APT mode. When the SV≥ETT, and the APT condition is not met, then the processor transmits by an adjustment to the SVV to track an amplitude modulation envelope during the TS in an ET mode.

Claims (20)

1. An apparatus comprising:

envelope tracking (ET) circuitry configured to generate an output voltage in a first processing path during a transmission time slot (TS), the output voltage generated based on in-phase (I) and quadrature (Q) signals, the I and Q signals generated in the first processing path using an amplitude scaled signal corresponding to an input signal, and the output voltage being adjusted relative to an amplitude-modulated signal corresponding to the input signal when a target output power of the apparatus is greater than or equal to an ET threshold (ETT); and

modulator circuitry coupled to the ET circuitry and configured to generate the amplitude-modulated signal in a second processing path using amplitude scaling and modulate the output voltage based on the amplitude-modulated signal,

wherein the amplitude scaled signal is generated in the first processing path based on the amplitude scaling used in the second processing path.

2. The apparatus of claim 1 , wherein the ETT is within a predefined number of decibels of an upper limit of a PA power range.

3. The apparatus of claim 1 , wherein the ET circuitry controls the output voltage only when an average power tracking (APT) condition is not met.

4. The apparatus of claim 3 , wherein the APT condition relates to one of: a resource block count (RBC), a resource block distance (RBD), or a power ratio between disjoined clusters (CPR).

5. The apparatus of claim 4 , wherein the APT condition relates to a threshold value comprising one of a resource block count threshold (RBCT), a resource block distance threshold (RBDT), and a power ratio between disjoined clusters threshold (CPRT).

6. The apparatus of claim 5 , wherein the APT condition is defined as at least one of: when the resource block count is smaller than the resource block count threshold; when the resource block distance is greater than the resource block distance threshold; or when the power ratio between disjoined clusters is greater than the power ratio between disjoined clusters threshold.

7. The apparatus of claim 1 , wherein the modulator circuitry includes a direct current (DC)-to-DC (DC-DC) converter.

8. The apparatus of claim 1 , further comprising a memory, wherein the memory is configured to store a look up table (LUT) that maps values of a signal envelope to the output voltage.

9. A device comprising:

envelope tracking (ET) circuitry configured to generate an output voltage in a first processing path during a transmission time slot (TS), the output voltage generated based on in-phase (I) and quadrature (Q) signals, the I and Q signals generated in the first processing path using an amplitude scaled signal corresponding to an input signal, and the output voltage being adjusted relative to an amplitude-modulated signal corresponding to the input signal when a target output power of the device is greater than or equal to an ET threshold (ETT);

modulator circuitry coupled to the ET circuitry and configured to generate the amplitude-modulated signal in a second processing path using amplitude scaling and modulate the output voltage based on the amplitude-modulated signal; and

two or more antennas configured to transmit an output signal amplified based on the output voltage,

wherein the amplitude scaled signal is generated in the first processing path based on the amplitude scaling used in the second processing path.

10. The device of claim 9 , wherein the ETT is within a predefined number of decibels of an upper limit of a PA power range.

11. The device of claim 9 , wherein the ET circuitry controls the output voltage only when an average power tracking (APT) condition is not met, and wherein the APT condition relates to one of: a resource block count (RBC), a resource block distance (RBD), or a power ratio between disjoined clusters (CPR).

12. The device of claim 11 , wherein the APT condition relates to a threshold value comprising one of a resource block count threshold (RBCT), a resource block distance threshold (RBDT), and a power ratio between disjoined clusters threshold (CPRT).

13. The device of claim 9 , further comprising a power amplifier configured to receive one of an output of the modulator circuitry or, when the target output power of the device is less than the ETT, a control signal instructing the power amplifier to operate in an average power tracking (APT) mode when amplifying the output signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 056337/0609 →
Continuity (3)
Continuation 15475996 · Mar 31, 2017
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